intel/fs: fix pull-constant-load prior to gfx7
Inad9bc1ffb5
("intel/fs: enable UBO accesses through bindless heap") we added a new source, we need to fixup the source index for the generator. Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Fixes:ad9bc1ffb5
("intel/fs: enable UBO accesses through bindless heap") Reviewed-by: Ian Romanick <ian.d.romanick@intel.com> Tested-by: Ian Romanick <ian.d.romanick@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23405>
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@@ -2107,7 +2107,9 @@ fs_generator::generate_code(const cfg_t *cfg, int dispatch_width,
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case FS_OPCODE_UNIFORM_PULL_CONSTANT_LOAD:
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assert(inst->force_writemask_all);
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generate_uniform_pull_constant_load(inst, dst, src[0], src[1]);
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generate_uniform_pull_constant_load(inst, dst,
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src[PULL_UNIFORM_CONSTANT_SRC_SURFACE],
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src[PULL_UNIFORM_CONSTANT_SRC_OFFSET]);
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send_count++;
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break;
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@@ -3086,6 +3086,7 @@ fs_visitor::lower_uniform_pull_constant_loads()
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invalidate_analysis(DEPENDENCY_INSTRUCTIONS | DEPENDENCY_VARIABLES);
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} else {
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assert(surface_handle.file == BAD_FILE);
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/* Before register allocation, we didn't tell the scheduler about the
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* MRF we use. We know it's safe to use this MRF because nothing
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* else does except for register spill/unspill, which generates and
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