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intel/fs: fix pull-constant-load prior to gfx7

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In ad9bc1ffb5 ("intel/fs: enable UBO accesses through bindless heap")
we added a new source, we need to fixup the source index for the
generator.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: ad9bc1ffb5 ("intel/fs: enable UBO accesses through bindless heap")
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Tested-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23405>
This commit is contained in:
Lionel Landwerlin
2023-06-02 22:37:46 +03:00
committed by Marge Bot
parent c56dd678e4
commit 049c791a63
2 changed files with 4 additions and 1 deletions
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1
src/intel/compiler/brw_lower_logical_sends.cpp
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@@ -3086,6 +3086,7 @@ fs_visitor::lower_uniform_pull_constant_loads()
invalidate_analysis(DEPENDENCY_INSTRUCTIONS | DEPENDENCY_VARIABLES);
} else {
assert(surface_handle.file == BAD_FILE);
/* Before register allocation, we didn't tell the scheduler about the
* MRF we use. We know it's safe to use this MRF because nothing
* else does except for register spill/unspill, which generates and