intel/compiler: Add id parameter to shader_debug_log callback
There are two problems with the current architecture.
In OpenGL, the id is supposed to be a unique identifier for a particular
log source. This is done so that applications can (theoretically)
filter particular log messages. The debug callback infrastructure in
Mesa assigns a uniqe value when a value of 0 is passed in. This causes
the id to get set once to a unique value for each message.
By passing a stack variable that is initialized to 0 on every call,
every time the same message is logged, it will have a different id.
This isn't great, but it's also not catastrophic.
When threaded shader compiles are used, the id *pointer* is saved and
dereferenced at a possibly much later time on a possibly different
thread. This causes one thread to access the stack from a different
thread... and that stack frame might not be valid any more. :(
This fixes shader-db crashes of various kinds on Iris with threaded
shader compiles enabled.
Fixes: 42c34e1ac8
("iris: Enable threaded shader compilation")
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12136>
This commit is contained in:
@@ -69,7 +69,7 @@ struct brw_compiler {
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struct ra_class *aligned_bary_class;
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} fs_reg_sets[3];
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void (*shader_debug_log)(void *, const char *str, ...) PRINTFLIKE(2, 3);
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void (*shader_debug_log)(void *, unsigned *id, const char *str, ...) PRINTFLIKE(3, 4);
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void (*shader_perf_log)(void *, const char *str, ...) PRINTFLIKE(2, 3);
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bool scalar_stage[MESA_ALL_SHADER_STAGES];
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@@ -121,6 +121,11 @@ struct brw_compiler {
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bool indirect_ubos_use_sampler;
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};
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#define brw_shader_debug_log(compiler, data, fmt, ... ) do { \
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static unsigned id = 0; \
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compiler->shader_debug_log(data, &id, fmt, ##__VA_ARGS__); \
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} while (0)
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/**
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* We use a constant subgroup size of 32. It really only needs to be a
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* maximum and, since we do SIMD32 for compute shaders in some cases, it
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@@ -2794,19 +2794,19 @@ fs_generator::generate_code(const cfg_t *cfg, int dispatch_width,
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#endif
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assert(validated);
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compiler->shader_debug_log(log_data,
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"%s SIMD%d shader: %d inst, %d loops, %u cycles, "
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"%d:%d spills:fills, %u sends, "
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"scheduled with mode %s, "
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"Promoted %u constants, "
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"compacted %d to %d bytes.",
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_mesa_shader_stage_to_abbrev(stage),
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dispatch_width, before_size / 16 - nop_count,
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loop_count, perf.latency,
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spill_count, fill_count, send_count,
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shader_stats.scheduler_mode,
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shader_stats.promoted_constants,
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before_size, after_size);
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brw_shader_debug_log(compiler, log_data,
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"%s SIMD%d shader: %d inst, %d loops, %u cycles, "
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"%d:%d spills:fills, %u sends, "
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"scheduled with mode %s, "
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"Promoted %u constants, "
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"compacted %d to %d bytes.",
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_mesa_shader_stage_to_abbrev(stage),
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dispatch_width, before_size / 16 - nop_count,
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loop_count, perf.latency,
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spill_count, fill_count, send_count,
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shader_stats.scheduler_mode,
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shader_stats.promoted_constants,
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before_size, after_size);
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if (stats) {
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stats->dispatch_width = dispatch_width;
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stats->instructions = before_size / 16 - nop_count;
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@@ -2263,13 +2263,13 @@ generate_code(struct brw_codegen *p,
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ralloc_free(disasm_info);
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assert(validated);
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compiler->shader_debug_log(log_data,
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"%s vec4 shader: %d inst, %d loops, %u cycles, "
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"%d:%d spills:fills, %u sends, "
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"compacted %d to %d bytes.",
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stage_abbrev, before_size / 16,
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loop_count, perf.latency, spill_count,
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fill_count, send_count, before_size, after_size);
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brw_shader_debug_log(compiler, log_data,
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"%s vec4 shader: %d inst, %d loops, %u cycles, "
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"%d:%d spills:fills, %u sends, "
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"compacted %d to %d bytes.",
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stage_abbrev, before_size / 16,
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loop_count, perf.latency, spill_count,
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fill_count, send_count, before_size, after_size);
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if (stats) {
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stats->dispatch_width = 0;
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stats->instructions = before_size / 16;
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