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broadcom/vc5: Add the new TMU write addresses for V3D 4.x (and r5rep).

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The V3D 3.x series of TMU writes with meaning depending on the texture
type is replaced with writes to specific registers for each texture
argument semantic.
This commit is contained in:
Eric Anholt
2018-01-10 13:56:11 -08:00
parent 42a35da96d
commit 028f6b327c
2 changed files with 37 additions and 10 deletions
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31
src/broadcom/qpu/qpu_instr.c
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@@ -54,6 +54,22 @@ v3d_qpu_magic_waddr_name(enum v3d_qpu_waddr waddr)
[V3D_QPU_WADDR_LOG] = "log",
[V3D_QPU_WADDR_SIN] = "sin",
[V3D_QPU_WADDR_RSQRT2] = "rsqrt2",
[V3D_QPU_WADDR_TMUC] = "tmuc",
[V3D_QPU_WADDR_TMUS] = "tmus",
[V3D_QPU_WADDR_TMUT] = "tmut",
[V3D_QPU_WADDR_TMUR] = "tmur",
[V3D_QPU_WADDR_TMUI] = "tmui",
[V3D_QPU_WADDR_TMUB] = "tmub",
[V3D_QPU_WADDR_TMUDREF] = "tmudref",
[V3D_QPU_WADDR_TMUOFF] = "tmuoff",
[V3D_QPU_WADDR_TMUSCM] = "tmuscm",
[V3D_QPU_WADDR_TMUSF] = "tmusf",
[V3D_QPU_WADDR_TMUSLOD] = "tmuslod",
[V3D_QPU_WADDR_TMUHS] = "tmuhs",
[V3D_QPU_WADDR_TMUHSCM] = "tmuscm",
[V3D_QPU_WADDR_TMUHSF] = "tmuhsf",
[V3D_QPU_WADDR_TMUHSLOD] = "tmuhslod",
[V3D_QPU_WADDR_R5REP] = "r5rep",
};
return waddr_magic[waddr];
@@ -489,16 +505,11 @@ v3d_qpu_magic_waddr_is_sfu(enum v3d_qpu_waddr waddr)
bool
v3d_qpu_magic_waddr_is_tmu(enum v3d_qpu_waddr waddr)
{
switch (waddr) {
case V3D_QPU_WADDR_TMU:
case V3D_QPU_WADDR_TMUL:
case V3D_QPU_WADDR_TMUD:
case V3D_QPU_WADDR_TMUA:
case V3D_QPU_WADDR_TMUAU:
return true;
default:
return false;
}
/* XXX: WADDR_TMU changed to UNIFA on 4.x */
return ((waddr >= V3D_QPU_WADDR_TMU &&
waddr <= V3D_QPU_WADDR_TMUAU) ||
(waddr >= V3D_QPU_WADDR_TMUC &&
waddr <= V3D_QPU_WADDR_TMUHSLOD));
}
bool