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vc4: Split UBO0 and UBO1 address uniform handling.

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I'm going to extend how UBO0 works in a moment.
This commit is contained in:
Eric Anholt
2019-04-08 21:39:08 -07:00
parent 7347d09d6a
commit 0204fb77e0
3 changed files with 20 additions and 19 deletions
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6
src/gallium/drivers/vc4/vc4_program.c
View File

@@ -135,7 +135,7 @@ indirect_uniform_load(struct vc4_compile *c, nir_intrinsic_instr *intr)
qir_ADD_dest(c, qir_reg(QFILE_TEX_S_DIRECT, 0), qir_ADD_dest(c, qir_reg(QFILE_TEX_S_DIRECT, 0),
indirect_offset, indirect_offset,
qir_uniform(c, QUNIFORM_UBO_ADDR, 0)); qir_uniform(c, QUNIFORM_UBO0_ADDR, 0));
c->num_texture_samples++; c->num_texture_samples++;
@@ -147,7 +147,7 @@ indirect_uniform_load(struct vc4_compile *c, nir_intrinsic_instr *intr)
static struct qreg static struct qreg
vc4_ubo_load(struct vc4_compile *c, nir_intrinsic_instr *intr) vc4_ubo_load(struct vc4_compile *c, nir_intrinsic_instr *intr)
{ {
unsigned buffer_index = nir_src_as_uint(intr->src[0]); int buffer_index = nir_src_as_uint(intr->src[0]);
assert(buffer_index == 1); assert(buffer_index == 1);
assert(c->stage == QSTAGE_FRAG); assert(c->stage == QSTAGE_FRAG);
@@ -160,7 +160,7 @@ vc4_ubo_load(struct vc4_compile *c, nir_intrinsic_instr *intr)
qir_ADD_dest(c, qir_reg(QFILE_TEX_S_DIRECT, 0), qir_ADD_dest(c, qir_reg(QFILE_TEX_S_DIRECT, 0),
offset, offset,
qir_uniform(c, QUNIFORM_UBO_ADDR, buffer_index)); qir_uniform(c, QUNIFORM_UBO1_ADDR, 0));
c->num_texture_samples++; c->num_texture_samples++;

3
src/gallium/drivers/vc4/vc4_qir.h
View File

@@ -269,7 +269,8 @@ enum quniform_contents {
QUNIFORM_TEXTURE_MSAA_ADDR, QUNIFORM_TEXTURE_MSAA_ADDR,
QUNIFORM_UBO_ADDR, QUNIFORM_UBO0_ADDR,
QUNIFORM_UBO1_ADDR,
QUNIFORM_TEXRECT_SCALE_X, QUNIFORM_TEXRECT_SCALE_X,
QUNIFORM_TEXRECT_SCALE_Y, QUNIFORM_TEXRECT_SCALE_Y,

30
src/gallium/drivers/vc4/vc4_uniforms.c
View File

@@ -271,22 +271,21 @@ vc4_write_uniforms(struct vc4_context *vc4, struct vc4_compiled_shader *shader,
data); data);
break; break;
case QUNIFORM_UBO_ADDR: case QUNIFORM_UBO0_ADDR:
if (data == 0) { cl_aligned_reloc(job, &job->uniforms,
cl_aligned_reloc(job, &job->uniforms, &uniforms, ubo, data);
&uniforms, ubo, 0);
} else {
struct pipe_constant_buffer *c =
&cb->cb[data];
struct vc4_resource *rsc =
vc4_resource(c->buffer);
cl_aligned_reloc(job, &job->uniforms,
&uniforms,
rsc->bo, c->buffer_offset);
}
break; break;
case QUNIFORM_UBO1_ADDR: {
struct vc4_resource *rsc =
vc4_resource(cb->cb[1].buffer);
cl_aligned_reloc(job, &job->uniforms,
&uniforms,
rsc->bo, cb->cb[1].buffer_offset);
break;
}
case QUNIFORM_TEXTURE_MSAA_ADDR: case QUNIFORM_TEXTURE_MSAA_ADDR:
write_texture_msaa_addr(job, &uniforms, texstate, data); write_texture_msaa_addr(job, &uniforms, texstate, data);
break; break;
@@ -390,7 +389,8 @@ vc4_set_shader_uniform_dirty_flags(struct vc4_compiled_shader *shader)
case QUNIFORM_UNIFORMS_ADDRESS: case QUNIFORM_UNIFORMS_ADDRESS:
break; break;
case QUNIFORM_UNIFORM: case QUNIFORM_UNIFORM:
case QUNIFORM_UBO_ADDR: case QUNIFORM_UBO0_ADDR:
case QUNIFORM_UBO1_ADDR:
dirty |= VC4_DIRTY_CONSTBUF; dirty |= VC4_DIRTY_CONSTBUF;
break; break;