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intel/fs: fix a couple of descriptor mistakes

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I found those issues while testing DOOM eternal and Ian also ran into
it with other shaders.

We write the desc register in SIMD1 exec_all, so all the data is in
the first component. We need to make sure to pass that component in
the lower SEND instructions.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Tested-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23354>
This commit is contained in:
Lionel Landwerlin
2023-06-01 09:30:37 +03:00
committed by Marge Bot
parent 27047e11fb
commit 018e306b8e
1 changed files with 2 additions and 2 deletions
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4
src/intel/compiler/brw_lower_logical_sends.cpp
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@@ -1152,7 +1152,7 @@ lower_sampler_logical_send_gfx7(const fs_builder &bld, fs_inst *inst, opcode op,
const fs_builder ubld = bld.group(1, 0).exec_all();
fs_reg desc = ubld.vgrf(BRW_REGISTER_TYPE_UD);
ubld.SHL(desc, sampler, brw_imm_ud(8));
inst->src[0] = desc;
inst->src[0] = component(desc, 0);
}
/* We assume that the driver provided the handle in the top 20 bits so
@@ -2602,7 +2602,7 @@ lower_interpolator_logical_send(const fs_builder &bld, fs_inst *inst,
inst->send_is_volatile = false;
inst->resize_sources(3);
inst->src[0] = desc;
inst->src[0] = component(desc, 0);
inst->src[1] = brw_imm_ud(0); /* ex_desc */
inst->src[2] = payload;
}