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anv/xe2+: Align push constant ranges to GRF boundaries.

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This fixes corruption of push constants on Xe2 due to a mismatch in
the uniform layout implemented by the compiler and assumed by the
driver.  To fix it we need to align the push constant ranges computed
by the Vulkan driver to a multiple of the GRF size of the platform.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29926>
This commit is contained in:
Francisco Jerez
2023-01-04 12:55:10 -08:00
committed by Marge Bot
parent 039f4fe25e
commit 01118a3fbb
3 changed files with 10 additions and 6 deletions
Download Patch File Download Diff File Expand all files Collapse all files

3
src/intel/vulkan/anv_nir.h
View File

@@ -97,7 +97,8 @@ void anv_nir_compute_push_layout(nir_shader *nir,
enum anv_descriptor_set_layout_type desc_type,
void *mem_ctx);
void anv_nir_validate_push_layout(struct brw_stage_prog_data *prog_data,
void anv_nir_validate_push_layout(const struct anv_physical_device *pdevice,
struct brw_stage_prog_data *prog_data,
struct anv_pipeline_bind_map *map);
bool anv_nir_update_resource_intel_block(nir_shader *shader);

8
src/intel/vulkan/anv_nir_compute_push_layout.c
View File

@@ -150,7 +150,7 @@ anv_nir_compute_push_layout(nir_shader *nir,
struct anv_push_range push_constant_range = {
.set = ANV_DESCRIPTOR_SET_PUSH_CONSTANTS,
.start = push_start / 32,
.length = DIV_ROUND_UP(push_end - push_start, 32),
.length = ALIGN(push_end - push_start, devinfo->grf_size) / 32,
};
if (has_push_intrinsic) {
@@ -341,11 +341,13 @@ anv_nir_compute_push_layout(nir_shader *nir,
}
void
anv_nir_validate_push_layout(struct brw_stage_prog_data *prog_data,
anv_nir_validate_push_layout(const struct anv_physical_device *pdevice,
struct brw_stage_prog_data *prog_data,
struct anv_pipeline_bind_map *map)
{
#ifndef NDEBUG
unsigned prog_data_push_size = DIV_ROUND_UP(prog_data->nr_params, 8);
unsigned prog_data_push_size = ALIGN(prog_data->nr_params, pdevice->info.grf_size / 4) / 8;
for (unsigned i = 0; i < 4; i++)
prog_data_push_size += prog_data->ubo_ranges[i].length;

5
src/intel/vulkan/anv_pipeline.c
View File

@@ -2492,7 +2492,7 @@ anv_graphics_pipeline_compile(struct anv_graphics_base_pipeline *pipeline,
goto fail;
}
anv_nir_validate_push_layout(&stage->prog_data.base,
anv_nir_validate_push_layout(device->physical, &stage->prog_data.base,
&stage->bind_map);
struct anv_shader_upload_params upload_params = {
@@ -2681,7 +2681,8 @@ anv_pipeline_compile_cs(struct anv_compute_pipeline *pipeline,
return vk_error(pipeline, VK_ERROR_OUT_OF_HOST_MEMORY);
}
anv_nir_validate_push_layout(&stage.prog_data.base, &stage.bind_map);
anv_nir_validate_push_layout(device->physical, &stage.prog_data.base,
&stage.bind_map);
if (!stage.prog_data.cs.uses_num_work_groups) {
assert(stage.bind_map.surface_to_descriptor[0].set ==