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radv/llvm: implement the image load DCC bug

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Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10436>
This commit is contained in:
Samuel Pitoiset
2021-04-23 15:06:10 +02:00
committed by Marge Bot
parent 12048309a8
commit 00f0fae037
1 changed files with 13 additions and 0 deletions
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13
src/amd/vulkan/radv_nir_to_llvm.c
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@@ -584,6 +584,19 @@ radv_get_sampler_desc(struct ac_shader_abi *abi, unsigned descriptor_set, unsign
for (unsigned i = 4; i < 8; ++i)
components[i] = ac_llvm_extract_elem(&ctx->ac, descriptor2, i);
descriptor = ac_build_gather_values(&ctx->ac, components, 8);
} else if (desc_type == AC_DESC_IMAGE &&
ctx->args->options->has_image_load_dcc_bug &&
image && !write) {
LLVMValueRef components[8];
for (unsigned i = 0; i < 8; i++)
components[i] = ac_llvm_extract_elem(&ctx->ac, descriptor, i);
/* WRITE_COMPRESS_ENABLE must be 0 for all image loads to workaround a hardware bug. */
components[6] = LLVMBuildAnd(ctx->ac.builder, components[6],
LLVMConstInt(ctx->ac.i32, C_00A018_WRITE_COMPRESS_ENABLE, false), "");
descriptor = ac_build_gather_values(&ctx->ac, components, 8);
}
return descriptor;