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intel/compiler: Use builder to allocate fs regs for TCS store output

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Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18537>
This commit is contained in:
Caio Oliveira
2022-09-10 23:25:28 -07:00
parent fe8e18c782
commit 00b8f9a3a6
1 changed files with 1 additions and 2 deletions
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src/intel/compiler/brw_fs_nir.cpp
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@@ -3036,8 +3036,7 @@ fs_visitor::nir_emit_tcs_intrinsic(const fs_builder &bld,
srcs[URB_LOGICAL_SRC_HANDLE] = get_tcs_output_urb_handle();
srcs[URB_LOGICAL_SRC_PER_SLOT_OFFSETS] = indirect_offset;
srcs[URB_LOGICAL_SRC_CHANNEL_MASK] = mask_reg;
srcs[URB_LOGICAL_SRC_DATA] = fs_reg(VGRF, alloc.allocate(length),
BRW_REGISTER_TYPE_F);
srcs[URB_LOGICAL_SRC_DATA] = bld.vgrf(BRW_REGISTER_TYPE_F, length);
bld.LOAD_PAYLOAD(srcs[URB_LOGICAL_SRC_DATA], sources, length, 0);
fs_inst *inst = bld.emit(SHADER_OPCODE_URB_WRITE_LOGICAL, reg_undef,