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radv: configure PA_SC_HISZ_CONTROL on GFX12

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Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29482>
This commit is contained in:
Samuel Pitoiset
2024-05-29 17:34:52 +02:00
committed by Marge Bot
parent 1f078f02d1
commit 00361d1ece
3 changed files with 9 additions and 0 deletions
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2
src/amd/vulkan/radv_cmd_buffer.c
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@@ -2616,6 +2616,8 @@ radv_emit_fragment_shader(struct radv_cmd_buffer *cmd_buffer)
ps->info.regs.ps.spi_ps_in_control);
radeon_set_context_reg(cmd_buffer->cs, R_028650_SPI_SHADER_Z_FORMAT, ps->info.regs.ps.spi_shader_z_format);
radeon_set_context_reg(cmd_buffer->cs, R_028BBC_PA_SC_HISZ_CONTROL, ps->info.regs.ps.pa_sc_hisz_control);
} else {
radeon_opt_set_context_reg2(cmd_buffer, R_0286CC_SPI_PS_INPUT_ENA, RADV_TRACKED_SPI_PS_INPUT_ENA,
ps->config.spi_ps_input_ena, ps->config.spi_ps_input_addr);

6
src/amd/vulkan/radv_shader.c
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@@ -1681,6 +1681,12 @@ radv_precompute_registers_hw_fs(struct radv_device *device, struct radv_shader_b
if (pdev->info.gfx_level >= GFX12) {
info->regs.ps.spi_ps_in_control = S_028640_PS_W32_EN(info->wave_size == 32);
info->regs.ps.pa_sc_hisz_control = S_028BBC_ROUND(2); /* required minimum value */
if (info->ps.depth_layout == FRAG_DEPTH_LAYOUT_GREATER)
info->regs.ps.pa_sc_hisz_control |= S_028BBC_CONSERVATIVE_Z_EXPORT(V_028BBC_EXPORT_GREATER_THAN_Z);
else if (info->ps.depth_layout == FRAG_DEPTH_LAYOUT_LESS)
info->regs.ps.pa_sc_hisz_control |= S_028BBC_CONSERVATIVE_Z_EXPORT(V_028BBC_EXPORT_LESS_THAN_Z);
} else {
/* GFX11 workaround when there are no PS inputs but LDS is used. */
const bool param_gen = pdev->info.gfx_level == GFX11 && !info->ps.num_interp && binary->config.lds_size;

1
src/amd/vulkan/radv_shader_info.h
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@@ -285,6 +285,7 @@ struct radv_shader_info {
uint32_t pa_sc_shader_control;
uint32_t spi_ps_in_control;
uint32_t spi_shader_z_format;
uint32_t pa_sc_hisz_control;
} ps;
struct {