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radv: check active NIR stages before trying to merge shaders on GFX9+

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For shader object.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27336>
This commit is contained in:
Samuel Pitoiset
2023-08-11 10:33:03 +02:00
parent 1fe8770bbe
commit 0018faf384
1 changed files with 4 additions and 2 deletions
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6
src/amd/vulkan/radv_pipeline_graphics.c
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@@ -2254,10 +2254,12 @@ radv_graphics_shaders_nir_to_asm(struct radv_device *device, struct vk_pipeline_
/* On GFX9+, TES is merged with GS and VS is merged with TCS or GS. */
if (device->physical_device->rad_info.gfx_level >= GFX9 &&
(s == MESA_SHADER_TESS_CTRL || s == MESA_SHADER_GEOMETRY)) {
((s == MESA_SHADER_GEOMETRY &&
(active_nir_stages & (VK_SHADER_STAGE_VERTEX_BIT | VK_SHADER_STAGE_TESSELLATION_EVALUATION_BIT))) ||
(s == MESA_SHADER_TESS_CTRL && (active_nir_stages & VK_SHADER_STAGE_VERTEX_BIT)))) {
gl_shader_stage pre_stage;
if (s == MESA_SHADER_GEOMETRY && stages[MESA_SHADER_TESS_EVAL].nir) {
if (s == MESA_SHADER_GEOMETRY && (active_nir_stages & VK_SHADER_STAGE_TESSELLATION_EVALUATION_BIT)) {
pre_stage = MESA_SHADER_TESS_EVAL;
} else {
pre_stage = MESA_SHADER_VERTEX;