radeonsi: increase gfx1100/gfx1101 physical vgprs
https://reviews.llvm.org/D134522 Signed-off-by: Rhys Perry <pendingchaos02@gmail.com> Reviewed-by: Daniel Schürmann <daniel@schuermann.dev> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18825>
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@@ -118,16 +118,6 @@ void ac_parse_shader_binary_config(const char *data, size_t nbytes, unsigned wav
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if (!conf->spi_ps_input_addr)
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conf->spi_ps_input_addr = conf->spi_ps_input_ena;
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/* GFX 10.3 internally:
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* - aligns VGPRS to 16 for Wave32 and 8 for Wave64
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* - aligns LDS to 1024
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*
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* For shader-db stats, set num_vgprs that the hw actually uses.
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*/
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if (info->gfx_level == GFX10_3) {
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conf->num_vgprs = align(conf->num_vgprs, wave_size == 32 ? 16 : 8);
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}
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/* Enable 64-bit and 16-bit denormals, because there is no performance
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* cost.
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*
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@@ -1058,10 +1058,25 @@ static void si_calculate_max_simd_waves(struct si_shader *shader)
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}
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if (conf->num_vgprs) {
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/* GFX 10.3 internally:
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* - aligns VGPRS to 16 for Wave32 and 8 for Wave64
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* - aligns LDS to 1024
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*
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* For shader-db stats, set num_vgprs that the hw actually uses.
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*/
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unsigned num_vgprs = conf->num_vgprs;
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if (sscreen->info.family == CHIP_GFX1100 || sscreen->info.family == CHIP_GFX1101) {
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num_vgprs = util_align_npot(num_vgprs, shader->wave_size == 32 ? 24 : 12);
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} else if (sscreen->info.gfx_level == GFX10_3) {
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num_vgprs = align(num_vgprs, shader->wave_size == 32 ? 16 : 8);
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} else {
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num_vgprs = align(num_vgprs, shader->wave_size == 32 ? 8 : 4);
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}
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/* Always print wave limits as Wave64, so that we can compare
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* Wave32 and Wave64 with shader-db fairly. */
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unsigned max_vgprs = sscreen->info.num_physical_wave64_vgprs_per_simd;
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max_simd_waves = MIN2(max_simd_waves, max_vgprs / conf->num_vgprs);
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max_simd_waves = MIN2(max_simd_waves, max_vgprs / num_vgprs);
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}
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unsigned max_lds_per_simd = sscreen->info.lds_size_per_workgroup / 4;
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