2018-08-15 09:18:41 -07:00
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/*
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* Copyright (C) 2016 Rob Clark <robclark@freedesktop.org>
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* Copyright © 2018 Google, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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* Authors:
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* Rob Clark <robclark@freedesktop.org>
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*/
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#include "pipe/p_state.h"
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#include "util/u_string.h"
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#include "util/u_memory.h"
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#include "util/u_inlines.h"
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2019-06-27 15:05:31 -07:00
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#include "util/format/u_format.h"
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2018-10-10 15:59:29 -04:00
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#include "util/hash_table.h"
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2018-08-15 09:18:41 -07:00
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#include "fd6_texture.h"
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2019-06-07 10:31:59 -07:00
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#include "fd6_resource.h"
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2018-08-15 09:18:41 -07:00
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#include "fd6_format.h"
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2018-10-10 15:59:29 -04:00
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#include "fd6_emit.h"
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static void fd6_texture_state_destroy(struct fd6_texture_state *state);
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2018-08-15 09:18:41 -07:00
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static enum a6xx_tex_clamp
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tex_clamp(unsigned wrap, bool clamp_to_edge, bool *needs_border)
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{
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/* Hardware does not support _CLAMP, but we emulate it: */
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if (wrap == PIPE_TEX_WRAP_CLAMP) {
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wrap = (clamp_to_edge) ?
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PIPE_TEX_WRAP_CLAMP_TO_EDGE : PIPE_TEX_WRAP_CLAMP_TO_BORDER;
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}
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switch (wrap) {
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case PIPE_TEX_WRAP_REPEAT:
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return A6XX_TEX_REPEAT;
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case PIPE_TEX_WRAP_CLAMP_TO_EDGE:
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return A6XX_TEX_CLAMP_TO_EDGE;
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case PIPE_TEX_WRAP_CLAMP_TO_BORDER:
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*needs_border = true;
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return A6XX_TEX_CLAMP_TO_BORDER;
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case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE:
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/* only works for PoT.. need to emulate otherwise! */
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return A6XX_TEX_MIRROR_CLAMP;
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case PIPE_TEX_WRAP_MIRROR_REPEAT:
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return A6XX_TEX_MIRROR_REPEAT;
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case PIPE_TEX_WRAP_MIRROR_CLAMP:
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case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_BORDER:
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/* these two we could perhaps emulate, but we currently
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* just don't advertise PIPE_CAP_TEXTURE_MIRROR_CLAMP
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*/
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default:
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DBG("invalid wrap: %u", wrap);
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return 0;
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}
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}
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static enum a6xx_tex_filter
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tex_filter(unsigned filter, bool aniso)
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{
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switch (filter) {
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case PIPE_TEX_FILTER_NEAREST:
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return A6XX_TEX_NEAREST;
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case PIPE_TEX_FILTER_LINEAR:
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return aniso ? A6XX_TEX_ANISO : A6XX_TEX_LINEAR;
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default:
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DBG("invalid filter: %u", filter);
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return 0;
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}
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}
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static void *
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fd6_sampler_state_create(struct pipe_context *pctx,
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const struct pipe_sampler_state *cso)
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{
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struct fd6_sampler_stateobj *so = CALLOC_STRUCT(fd6_sampler_stateobj);
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unsigned aniso = util_last_bit(MIN2(cso->max_anisotropy >> 1, 8));
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bool miplinear = false;
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bool clamp_to_edge;
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if (!so)
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return NULL;
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so->base = *cso;
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2018-10-10 15:59:29 -04:00
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so->seqno = ++fd6_context(fd_context(pctx))->tex_seqno;
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2018-08-15 09:18:41 -07:00
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if (cso->min_mip_filter == PIPE_TEX_MIPFILTER_LINEAR)
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miplinear = true;
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/*
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* For nearest filtering, _CLAMP means _CLAMP_TO_EDGE; for linear
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* filtering, _CLAMP means _CLAMP_TO_BORDER while additionally
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* clamping the texture coordinates to [0.0, 1.0].
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*
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* The clamping will be taken care of in the shaders. There are two
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* filters here, but let the minification one has a say.
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*/
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clamp_to_edge = (cso->min_img_filter == PIPE_TEX_FILTER_NEAREST);
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if (!clamp_to_edge) {
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so->saturate_s = (cso->wrap_s == PIPE_TEX_WRAP_CLAMP);
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so->saturate_t = (cso->wrap_t == PIPE_TEX_WRAP_CLAMP);
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so->saturate_r = (cso->wrap_r == PIPE_TEX_WRAP_CLAMP);
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}
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so->needs_border = false;
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so->texsamp0 =
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COND(miplinear, A6XX_TEX_SAMP_0_MIPFILTER_LINEAR_NEAR) |
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A6XX_TEX_SAMP_0_XY_MAG(tex_filter(cso->mag_img_filter, aniso)) |
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A6XX_TEX_SAMP_0_XY_MIN(tex_filter(cso->min_img_filter, aniso)) |
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A6XX_TEX_SAMP_0_ANISO(aniso) |
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A6XX_TEX_SAMP_0_WRAP_S(tex_clamp(cso->wrap_s, clamp_to_edge, &so->needs_border)) |
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A6XX_TEX_SAMP_0_WRAP_T(tex_clamp(cso->wrap_t, clamp_to_edge, &so->needs_border)) |
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A6XX_TEX_SAMP_0_WRAP_R(tex_clamp(cso->wrap_r, clamp_to_edge, &so->needs_border));
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so->texsamp1 =
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2019-08-28 10:13:29 -07:00
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COND(cso->min_mip_filter == PIPE_TEX_MIPFILTER_NONE,
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A6XX_TEX_SAMP_1_MIPFILTER_LINEAR_FAR) |
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2018-08-15 09:18:41 -07:00
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COND(!cso->seamless_cube_map, A6XX_TEX_SAMP_1_CUBEMAPSEAMLESSFILTOFF) |
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COND(!cso->normalized_coords, A6XX_TEX_SAMP_1_UNNORM_COORDS);
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2019-08-28 10:13:29 -07:00
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so->texsamp0 |= A6XX_TEX_SAMP_0_LOD_BIAS(cso->lod_bias);
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so->texsamp1 |=
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A6XX_TEX_SAMP_1_MIN_LOD(cso->min_lod) |
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A6XX_TEX_SAMP_1_MAX_LOD(cso->max_lod);
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2018-08-15 09:18:41 -07:00
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if (cso->compare_mode)
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so->texsamp1 |= A6XX_TEX_SAMP_1_COMPARE_FUNC(cso->compare_func); /* maps 1:1 */
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return so;
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}
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2018-10-10 15:59:29 -04:00
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static void
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fd6_sampler_state_delete(struct pipe_context *pctx, void *hwcso)
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{
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struct fd6_context *fd6_ctx = fd6_context(fd_context(pctx));
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struct fd6_sampler_stateobj *samp = hwcso;
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hash_table_foreach(fd6_ctx->tex_cache, entry) {
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struct fd6_texture_state *state = entry->data;
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for (unsigned i = 0; i < ARRAY_SIZE(state->key.samp); i++) {
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if (samp->seqno == state->key.samp[i].seqno) {
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fd6_texture_state_destroy(entry->data);
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_mesa_hash_table_remove(fd6_ctx->tex_cache, entry);
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break;
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}
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}
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}
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free(hwcso);
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}
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2018-08-15 09:18:41 -07:00
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static void
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fd6_sampler_states_bind(struct pipe_context *pctx,
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enum pipe_shader_type shader, unsigned start,
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unsigned nr, void **hwcso)
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{
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struct fd_context *ctx = fd_context(pctx);
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struct fd6_context *fd6_ctx = fd6_context(ctx);
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uint16_t saturate_s = 0, saturate_t = 0, saturate_r = 0;
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unsigned i;
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if (!hwcso)
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nr = 0;
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for (i = 0; i < nr; i++) {
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if (hwcso[i]) {
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struct fd6_sampler_stateobj *sampler =
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fd6_sampler_stateobj(hwcso[i]);
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if (sampler->saturate_s)
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saturate_s |= (1 << i);
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if (sampler->saturate_t)
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saturate_t |= (1 << i);
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if (sampler->saturate_r)
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saturate_r |= (1 << i);
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}
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}
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fd_sampler_states_bind(pctx, shader, start, nr, hwcso);
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if (shader == PIPE_SHADER_FRAGMENT) {
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fd6_ctx->fsaturate =
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(saturate_s != 0) ||
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(saturate_t != 0) ||
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(saturate_r != 0);
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fd6_ctx->fsaturate_s = saturate_s;
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fd6_ctx->fsaturate_t = saturate_t;
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fd6_ctx->fsaturate_r = saturate_r;
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} else if (shader == PIPE_SHADER_VERTEX) {
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fd6_ctx->vsaturate =
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(saturate_s != 0) ||
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(saturate_t != 0) ||
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(saturate_r != 0);
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fd6_ctx->vsaturate_s = saturate_s;
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fd6_ctx->vsaturate_t = saturate_t;
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fd6_ctx->vsaturate_r = saturate_r;
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}
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}
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static struct pipe_sampler_view *
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fd6_sampler_view_create(struct pipe_context *pctx, struct pipe_resource *prsc,
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const struct pipe_sampler_view *cso)
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{
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struct fd6_pipe_sampler_view *so = CALLOC_STRUCT(fd6_pipe_sampler_view);
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struct fd_resource *rsc = fd_resource(prsc);
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2019-11-20 12:40:25 -08:00
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struct fdl_slice *slice = NULL;
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2018-08-15 09:18:41 -07:00
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enum pipe_format format = cso->format;
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2019-05-09 17:30:35 -07:00
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unsigned lvl, layers = 0;
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2018-08-15 09:18:41 -07:00
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if (!so)
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return NULL;
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2019-06-07 10:31:59 -07:00
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fd6_validate_format(fd_context(pctx), rsc, format);
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2018-08-15 09:18:41 -07:00
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if (format == PIPE_FORMAT_X32_S8X24_UINT) {
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rsc = rsc->stencil;
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format = rsc->base.format;
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}
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so->base = *cso;
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pipe_reference(NULL, &prsc->reference);
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so->base.texture = prsc;
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so->base.reference.count = 1;
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so->base.context = pctx;
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2018-10-10 15:59:29 -04:00
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so->seqno = ++fd6_context(fd_context(pctx))->tex_seqno;
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2018-08-15 09:18:41 -07:00
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if (cso->target == PIPE_BUFFER) {
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unsigned elements = cso->u.buf.size / util_format_get_blocksize(format);
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lvl = 0;
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so->texconst1 =
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2019-02-20 17:33:23 -05:00
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A6XX_TEX_CONST_1_WIDTH(elements & MASK(15)) |
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A6XX_TEX_CONST_1_HEIGHT(elements >> 15);
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2018-08-15 09:18:41 -07:00
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so->texconst2 =
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2019-02-20 17:33:23 -05:00
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A6XX_TEX_CONST_2_UNK4 |
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A6XX_TEX_CONST_2_UNK31;
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2018-08-15 09:18:41 -07:00
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so->offset = cso->u.buf.offset;
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} else {
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unsigned miplevels;
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lvl = fd_sampler_first_level(cso);
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2019-05-05 08:10:24 -07:00
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slice = fd_resource_slice(rsc, lvl);
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2018-08-15 09:18:41 -07:00
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miplevels = fd_sampler_last_level(cso) - lvl;
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layers = cso->u.tex.last_layer - cso->u.tex.first_layer + 1;
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2019-03-06 10:04:21 -05:00
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so->texconst0 |= A6XX_TEX_CONST_0_MIPLVLS(miplevels);
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2018-08-15 09:18:41 -07:00
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so->texconst1 =
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A6XX_TEX_CONST_1_WIDTH(u_minify(prsc->width0, lvl)) |
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A6XX_TEX_CONST_1_HEIGHT(u_minify(prsc->height0, lvl));
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so->texconst2 =
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A6XX_TEX_CONST_2_FETCHSIZE(fd6_pipe2fetchsize(format)) |
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A6XX_TEX_CONST_2_PITCH(
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2019-05-05 10:59:37 -07:00
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util_format_get_nblocksx(format, slice->pitch) * rsc->layout.cpp);
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2018-08-15 09:18:41 -07:00
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so->offset = fd_resource_offset(rsc, lvl, cso->u.tex.first_layer);
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2019-05-04 08:04:59 -07:00
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so->ubwc_offset = fd_resource_ubwc_offset(rsc, lvl, cso->u.tex.first_layer);
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2019-05-04 09:02:54 -07:00
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so->ubwc_enabled = fd_resource_ubwc_enabled(rsc, lvl);
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2019-01-07 11:58:53 -08:00
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}
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2019-03-06 10:04:21 -05:00
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so->texconst0 |= fd6_tex_const_0(prsc, lvl, cso->format,
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cso->swizzle_r, cso->swizzle_g,
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cso->swizzle_b, cso->swizzle_a);
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2019-01-07 11:58:53 -08:00
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if (so->ubwc_enabled) {
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2019-05-05 10:59:37 -07:00
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so->texconst9 |= A6XX_TEX_CONST_9_FLAG_BUFFER_ARRAY_PITCH(rsc->layout.ubwc_size);
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2019-11-25 11:23:03 -08:00
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so->texconst10 |= A6XX_TEX_CONST_10_FLAG_BUFFER_PITCH(rsc->layout.ubwc_slices[lvl].pitch);
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2018-08-15 09:18:41 -07:00
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}
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so->texconst2 |= A6XX_TEX_CONST_2_TYPE(fd6_tex_type(cso->target));
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switch (cso->target) {
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case PIPE_TEXTURE_RECT:
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case PIPE_TEXTURE_1D:
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case PIPE_TEXTURE_2D:
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so->texconst3 =
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2019-05-05 10:59:37 -07:00
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A6XX_TEX_CONST_3_ARRAY_PITCH(rsc->layout.layer_size);
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2018-08-15 09:18:41 -07:00
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so->texconst5 =
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A6XX_TEX_CONST_5_DEPTH(1);
|
|
|
|
break;
|
|
|
|
case PIPE_TEXTURE_1D_ARRAY:
|
|
|
|
case PIPE_TEXTURE_2D_ARRAY:
|
|
|
|
so->texconst3 =
|
2019-05-05 10:59:37 -07:00
|
|
|
A6XX_TEX_CONST_3_ARRAY_PITCH(rsc->layout.layer_size);
|
2018-08-15 09:18:41 -07:00
|
|
|
so->texconst5 =
|
|
|
|
A6XX_TEX_CONST_5_DEPTH(layers);
|
|
|
|
break;
|
|
|
|
case PIPE_TEXTURE_CUBE:
|
|
|
|
case PIPE_TEXTURE_CUBE_ARRAY:
|
|
|
|
so->texconst3 =
|
2019-05-05 10:59:37 -07:00
|
|
|
A6XX_TEX_CONST_3_ARRAY_PITCH(rsc->layout.layer_size);
|
2018-08-15 09:18:41 -07:00
|
|
|
so->texconst5 =
|
|
|
|
A6XX_TEX_CONST_5_DEPTH(layers / 6);
|
|
|
|
break;
|
|
|
|
case PIPE_TEXTURE_3D:
|
|
|
|
so->texconst3 =
|
2019-05-05 08:10:24 -07:00
|
|
|
A6XX_TEX_CONST_3_MIN_LAYERSZ(
|
|
|
|
fd_resource_slice(rsc, prsc->last_level)->size0) |
|
|
|
|
A6XX_TEX_CONST_3_ARRAY_PITCH(slice->size0);
|
2018-08-15 09:18:41 -07:00
|
|
|
so->texconst5 =
|
|
|
|
A6XX_TEX_CONST_5_DEPTH(u_minify(prsc->depth0, lvl));
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
2019-04-28 09:35:15 -07:00
|
|
|
if (so->ubwc_enabled) {
|
2019-11-18 16:17:55 -05:00
|
|
|
so->texconst3 |= A6XX_TEX_CONST_3_FLAG | A6XX_TEX_CONST_3_TILE_ALL;
|
2019-04-28 09:35:15 -07:00
|
|
|
}
|
|
|
|
|
2018-08-15 09:18:41 -07:00
|
|
|
return &so->base;
|
|
|
|
}
|
|
|
|
|
2018-10-10 15:59:29 -04:00
|
|
|
static void
|
|
|
|
fd6_sampler_view_destroy(struct pipe_context *pctx,
|
|
|
|
struct pipe_sampler_view *_view)
|
|
|
|
{
|
|
|
|
struct fd6_context *fd6_ctx = fd6_context(fd_context(pctx));
|
|
|
|
struct fd6_pipe_sampler_view *view = fd6_pipe_sampler_view(_view);
|
|
|
|
|
|
|
|
hash_table_foreach(fd6_ctx->tex_cache, entry) {
|
|
|
|
struct fd6_texture_state *state = entry->data;
|
|
|
|
|
|
|
|
for (unsigned i = 0; i < ARRAY_SIZE(state->key.view); i++) {
|
|
|
|
if (view->seqno == state->key.view[i].seqno) {
|
|
|
|
fd6_texture_state_destroy(entry->data);
|
|
|
|
_mesa_hash_table_remove(fd6_ctx->tex_cache, entry);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
pipe_resource_reference(&view->base.texture, NULL);
|
|
|
|
|
|
|
|
free(view);
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
static uint32_t
|
|
|
|
key_hash(const void *_key)
|
|
|
|
{
|
|
|
|
const struct fd6_texture_key *key = _key;
|
|
|
|
uint32_t hash = _mesa_fnv32_1a_offset_bias;
|
|
|
|
hash = _mesa_fnv32_1a_accumulate_block(hash, key, sizeof(*key));
|
|
|
|
return hash;
|
|
|
|
}
|
|
|
|
|
|
|
|
static bool
|
|
|
|
key_equals(const void *_a, const void *_b)
|
|
|
|
{
|
|
|
|
const struct fd6_texture_key *a = _a;
|
|
|
|
const struct fd6_texture_key *b = _b;
|
|
|
|
return memcmp(a, b, sizeof(struct fd6_texture_key)) == 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
struct fd6_texture_state *
|
2019-04-28 09:23:29 -07:00
|
|
|
fd6_texture_state(struct fd_context *ctx, enum pipe_shader_type type,
|
2018-10-10 15:59:29 -04:00
|
|
|
struct fd_texture_stateobj *tex)
|
|
|
|
{
|
|
|
|
struct fd6_context *fd6_ctx = fd6_context(ctx);
|
|
|
|
struct fd6_texture_key key;
|
|
|
|
bool needs_border = false;
|
|
|
|
|
|
|
|
memset(&key, 0, sizeof(key));
|
|
|
|
|
|
|
|
for (unsigned i = 0; i < tex->num_textures; i++) {
|
|
|
|
if (!tex->textures[i])
|
|
|
|
continue;
|
|
|
|
|
|
|
|
struct fd6_pipe_sampler_view *view =
|
|
|
|
fd6_pipe_sampler_view(tex->textures[i]);
|
|
|
|
|
|
|
|
key.view[i].rsc_seqno = fd_resource(view->base.texture)->seqno;
|
|
|
|
key.view[i].seqno = view->seqno;
|
|
|
|
}
|
|
|
|
|
|
|
|
for (unsigned i = 0; i < tex->num_samplers; i++) {
|
|
|
|
if (!tex->samplers[i])
|
|
|
|
continue;
|
|
|
|
|
|
|
|
struct fd6_sampler_stateobj *sampler =
|
|
|
|
fd6_sampler_stateobj(tex->samplers[i]);
|
|
|
|
|
|
|
|
key.samp[i].seqno = sampler->seqno;
|
|
|
|
|
|
|
|
needs_border |= sampler->needs_border;
|
|
|
|
}
|
|
|
|
|
2019-05-31 08:44:55 -07:00
|
|
|
key.type = type;
|
2019-04-28 09:23:29 -07:00
|
|
|
key.bcolor_offset = fd6_border_color_offset(ctx, type, tex);
|
2018-10-10 15:59:29 -04:00
|
|
|
|
|
|
|
uint32_t hash = key_hash(&key);
|
|
|
|
struct hash_entry *entry =
|
|
|
|
_mesa_hash_table_search_pre_hashed(fd6_ctx->tex_cache, hash, &key);
|
|
|
|
|
|
|
|
if (entry) {
|
|
|
|
return entry->data;
|
|
|
|
}
|
|
|
|
|
|
|
|
struct fd6_texture_state *state = CALLOC_STRUCT(fd6_texture_state);
|
|
|
|
|
|
|
|
state->key = key;
|
|
|
|
state->stateobj = fd_ringbuffer_new_object(ctx->pipe, 0x1000);
|
|
|
|
state->needs_border = needs_border;
|
|
|
|
|
2019-04-28 09:23:29 -07:00
|
|
|
fd6_emit_textures(ctx->pipe, state->stateobj, type, tex, key.bcolor_offset,
|
|
|
|
NULL, NULL);
|
2018-10-10 15:59:29 -04:00
|
|
|
|
|
|
|
/* NOTE: uses copy of key in state obj, because pointer passed by caller
|
|
|
|
* is probably on the stack
|
|
|
|
*/
|
|
|
|
_mesa_hash_table_insert_pre_hashed(fd6_ctx->tex_cache, hash,
|
|
|
|
&state->key, state);
|
|
|
|
|
|
|
|
return state;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
fd6_texture_state_destroy(struct fd6_texture_state *state)
|
|
|
|
{
|
|
|
|
fd_ringbuffer_del(state->stateobj);
|
|
|
|
free(state);
|
|
|
|
}
|
|
|
|
|
2018-08-15 09:18:41 -07:00
|
|
|
void
|
|
|
|
fd6_texture_init(struct pipe_context *pctx)
|
|
|
|
{
|
2018-10-10 15:59:29 -04:00
|
|
|
struct fd6_context *fd6_ctx = fd6_context(fd_context(pctx));
|
|
|
|
|
2018-08-15 09:18:41 -07:00
|
|
|
pctx->create_sampler_state = fd6_sampler_state_create;
|
2018-10-10 15:59:29 -04:00
|
|
|
pctx->delete_sampler_state = fd6_sampler_state_delete;
|
2018-08-15 09:18:41 -07:00
|
|
|
pctx->bind_sampler_states = fd6_sampler_states_bind;
|
2018-10-10 15:59:29 -04:00
|
|
|
|
2018-08-15 09:18:41 -07:00
|
|
|
pctx->create_sampler_view = fd6_sampler_view_create;
|
2018-10-10 15:59:29 -04:00
|
|
|
pctx->sampler_view_destroy = fd6_sampler_view_destroy;
|
2019-03-06 09:44:14 -05:00
|
|
|
pctx->set_sampler_views = fd_set_sampler_views;
|
2018-10-10 15:59:29 -04:00
|
|
|
|
|
|
|
fd6_ctx->tex_cache = _mesa_hash_table_create(NULL, key_hash, key_equals);
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
|
|
|
fd6_texture_fini(struct pipe_context *pctx)
|
|
|
|
{
|
|
|
|
struct fd6_context *fd6_ctx = fd6_context(fd_context(pctx));
|
|
|
|
|
|
|
|
hash_table_foreach(fd6_ctx->tex_cache, entry) {
|
|
|
|
fd6_texture_state_destroy(entry->data);
|
|
|
|
}
|
|
|
|
ralloc_free(fd6_ctx->tex_cache);
|
2018-08-15 09:18:41 -07:00
|
|
|
}
|