2011-07-04 20:21:37 -07:00
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/**************************************************************************
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*
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* Copyright 2011 The Chromium OS authors.
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the
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* "Software"), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sub license, and/or sell copies of the Software, and to
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* permit persons to whom the Software is furnished to do so, subject to
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* the following conditions:
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*
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* The above copyright notice and this permission notice (including the
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* next paragraph) shall be included in all copies or substantial portions
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* of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
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* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
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* IN NO EVENT SHALL GOOGLE AND/OR ITS SUPPLIERS BE LIABLE FOR
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* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
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* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
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* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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**************************************************************************/
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#include "i915_reg.h"
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#include "i915_context.h"
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#include "i915_fpc.h"
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#include "pipe/p_shader_tokens.h"
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#include "util/u_math.h"
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#include "util/u_memory.h"
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#include "util/u_string.h"
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#include "tgsi/tgsi_parse.h"
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#include "tgsi/tgsi_dump.h"
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static boolean same_dst_reg(struct i915_full_dst_register* d1, struct i915_full_dst_register* d2)
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{
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return (d1->Register.File == d2->Register.File &&
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d1->Register.Indirect == d2->Register.Indirect &&
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d1->Register.Dimension == d2->Register.Dimension &&
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d1->Register.Index == d2->Register.Index);
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}
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static boolean same_src_reg(struct i915_full_src_register* d1, struct i915_full_src_register* d2)
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{
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return (d1->Register.File == d2->Register.File &&
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d1->Register.Indirect == d2->Register.Indirect &&
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d1->Register.Dimension == d2->Register.Dimension &&
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d1->Register.Index == d2->Register.Index &&
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d1->Register.Absolute == d2->Register.Absolute &&
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d1->Register.Negate == d2->Register.Negate);
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}
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2011-07-06 11:44:19 -07:00
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static boolean is_unswizzled(struct i915_full_src_register* r,
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2011-07-07 16:56:23 -07:00
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unsigned write_mask)
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2011-07-06 11:44:19 -07:00
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{
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2011-07-07 16:56:23 -07:00
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if ( write_mask & TGSI_WRITEMASK_X && r->Register.SwizzleX != TGSI_SWIZZLE_X)
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2011-07-06 11:44:19 -07:00
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return FALSE;
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2011-07-07 16:56:23 -07:00
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if ( write_mask & TGSI_WRITEMASK_Y && r->Register.SwizzleY != TGSI_SWIZZLE_Y)
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2011-07-06 11:44:19 -07:00
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return FALSE;
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2011-07-07 16:56:23 -07:00
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if ( write_mask & TGSI_WRITEMASK_Z && r->Register.SwizzleZ != TGSI_SWIZZLE_Z)
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2011-07-06 11:44:19 -07:00
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return FALSE;
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2011-07-07 16:56:23 -07:00
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if ( write_mask & TGSI_WRITEMASK_W && r->Register.SwizzleW != TGSI_SWIZZLE_W)
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2011-07-06 11:44:19 -07:00
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return FALSE;
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2011-07-06 14:10:51 -07:00
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return TRUE;
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2011-07-06 11:44:19 -07:00
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}
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2011-07-04 20:21:37 -07:00
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2011-07-07 00:15:05 -07:00
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static boolean op_commutes(unsigned opcode)
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{
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if (opcode == TGSI_OPCODE_ADD) return TRUE;
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if (opcode == TGSI_OPCODE_MUL) return TRUE;
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return FALSE;
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}
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static unsigned op_neutral_element(unsigned opcode)
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{
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if (opcode == TGSI_OPCODE_ADD)
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return TGSI_SWIZZLE_ZERO;
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if (opcode == TGSI_OPCODE_MUL)
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return TGSI_SWIZZLE_ONE;
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debug_printf("Unknown opcode %d\n",opcode);
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return TGSI_SWIZZLE_ZERO;
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}
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2011-07-07 16:56:23 -07:00
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/*
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* Sets the swizzle to the neutral element for the operation for the bits
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* of writemask which are set, swizzle to identity otherwise.
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*/
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static void set_neutral_element_swizzle(struct i915_full_src_register* r,
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unsigned write_mask,
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unsigned neutral)
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{
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if ( write_mask & TGSI_WRITEMASK_X )
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r->Register.SwizzleX = neutral;
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else
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r->Register.SwizzleX = TGSI_SWIZZLE_X;
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if ( write_mask & TGSI_WRITEMASK_Y )
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r->Register.SwizzleY = neutral;
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else
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r->Register.SwizzleY = TGSI_SWIZZLE_Y;
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if ( write_mask & TGSI_WRITEMASK_Z )
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r->Register.SwizzleZ = neutral;
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else
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r->Register.SwizzleZ = TGSI_SWIZZLE_Z;
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if ( write_mask & TGSI_WRITEMASK_W )
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r->Register.SwizzleW = neutral;
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else
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r->Register.SwizzleW = TGSI_SWIZZLE_W;
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}
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2011-07-04 20:21:37 -07:00
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/*
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* Optimize away things like:
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* MUL OUT[0].xyz, TEMP[1], TEMP[2]
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* MOV OUT[0].w, TEMP[2]
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* into:
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* MUL OUT[0].xyzw, TEMP[1].xyz1, TEMP[2]
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* This is useful for optimizing texenv.
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*/
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2011-07-07 00:15:05 -07:00
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static void i915_fpc_optimize_mov_after_alu(union i915_full_token* current, union i915_full_token* next)
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2011-07-04 20:21:37 -07:00
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{
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if ( current->Token.Type == TGSI_TOKEN_TYPE_INSTRUCTION &&
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next->Token.Type == TGSI_TOKEN_TYPE_INSTRUCTION &&
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2011-07-07 00:15:05 -07:00
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op_commutes(current->FullInstruction.Instruction.Opcode) &&
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2011-07-07 16:56:23 -07:00
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current->FullInstruction.Instruction.Saturate == next->FullInstruction.Instruction.Saturate &&
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2011-07-04 20:21:37 -07:00
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next->FullInstruction.Instruction.Opcode == TGSI_OPCODE_MOV &&
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same_dst_reg(&next->FullInstruction.Dst[0], &next->FullInstruction.Dst[0]) &&
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2011-07-06 11:44:19 -07:00
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same_src_reg(&next->FullInstruction.Src[0], ¤t->FullInstruction.Src[1]) &&
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2011-07-07 16:56:23 -07:00
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is_unswizzled(¤t->FullInstruction.Src[0], current->FullInstruction.Dst[0].Register.WriteMask) &&
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is_unswizzled(¤t->FullInstruction.Src[1], current->FullInstruction.Dst[0].Register.WriteMask) &&
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is_unswizzled(&next->FullInstruction.Src[0], next->FullInstruction.Dst[0].Register.WriteMask) )
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2011-07-04 20:21:37 -07:00
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{
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next->FullInstruction.Instruction.Opcode = TGSI_OPCODE_NOP;
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2011-07-07 16:56:23 -07:00
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set_neutral_element_swizzle(¤t->FullInstruction.Src[1], 0, 0);
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set_neutral_element_swizzle(¤t->FullInstruction.Src[0],
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next->FullInstruction.Dst[0].Register.WriteMask,
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op_neutral_element(current->FullInstruction.Instruction.Opcode));
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current->FullInstruction.Dst[0].Register.WriteMask = current->FullInstruction.Dst[0].Register.WriteMask |
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next->FullInstruction.Dst[0].Register.WriteMask;
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2011-07-04 20:21:37 -07:00
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return;
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}
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if ( current->Token.Type == TGSI_TOKEN_TYPE_INSTRUCTION &&
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next->Token.Type == TGSI_TOKEN_TYPE_INSTRUCTION &&
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2011-07-07 00:15:05 -07:00
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op_commutes(current->FullInstruction.Instruction.Opcode) &&
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2011-07-07 16:56:23 -07:00
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current->FullInstruction.Instruction.Saturate == next->FullInstruction.Instruction.Saturate &&
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2011-07-04 20:21:37 -07:00
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next->FullInstruction.Instruction.Opcode == TGSI_OPCODE_MOV &&
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same_dst_reg(&next->FullInstruction.Dst[0], &next->FullInstruction.Dst[0]) &&
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2011-07-06 11:44:19 -07:00
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same_src_reg(&next->FullInstruction.Src[0], ¤t->FullInstruction.Src[0]) &&
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2011-07-07 16:56:23 -07:00
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is_unswizzled(¤t->FullInstruction.Src[0], current->FullInstruction.Dst[0].Register.WriteMask) &&
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is_unswizzled(¤t->FullInstruction.Src[1], current->FullInstruction.Dst[0].Register.WriteMask) &&
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is_unswizzled(&next->FullInstruction.Src[0], next->FullInstruction.Dst[0].Register.WriteMask) )
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2011-07-04 20:21:37 -07:00
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{
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next->FullInstruction.Instruction.Opcode = TGSI_OPCODE_NOP;
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2011-07-07 16:56:23 -07:00
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set_neutral_element_swizzle(¤t->FullInstruction.Src[0], 0, 0);
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set_neutral_element_swizzle(¤t->FullInstruction.Src[1],
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next->FullInstruction.Dst[0].Register.WriteMask,
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op_neutral_element(current->FullInstruction.Instruction.Opcode));
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current->FullInstruction.Dst[0].Register.WriteMask = current->FullInstruction.Dst[0].Register.WriteMask |
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next->FullInstruction.Dst[0].Register.WriteMask;
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2011-07-04 20:21:37 -07:00
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return;
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}
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}
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static void copy_src_reg(struct i915_src_register* o, const struct tgsi_src_register* i)
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{
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o->File = i->File;
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o->Indirect = i->Indirect;
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o->Dimension = i->Dimension;
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o->Index = i->Index;
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o->SwizzleX = i->SwizzleX;
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o->SwizzleY = i->SwizzleY;
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o->SwizzleZ = i->SwizzleZ;
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o->SwizzleW = i->SwizzleW;
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o->Absolute = i->Absolute;
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o->Negate = i->Negate;
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}
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static void copy_dst_reg(struct i915_dst_register* o, const struct tgsi_dst_register* i)
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{
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o->File = i->File;
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o->WriteMask = i->WriteMask;
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o->Indirect = i->Indirect;
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o->Dimension = i->Dimension;
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o->Index = i->Index;
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}
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static void copy_instruction(struct i915_full_instruction* o, const struct tgsi_full_instruction* i)
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{
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memcpy(&o->Instruction, &i->Instruction, sizeof(o->Instruction));
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memcpy(&o->Texture, &i->Texture, sizeof(o->Texture));
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copy_dst_reg(&o->Dst[0].Register, &i->Dst[0].Register);
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copy_src_reg(&o->Src[0].Register, &i->Src[0].Register);
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copy_src_reg(&o->Src[1].Register, &i->Src[1].Register);
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copy_src_reg(&o->Src[2].Register, &i->Src[2].Register);
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}
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static void copy_token(union i915_full_token* o, union tgsi_full_token* i)
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{
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if (i->Token.Type != TGSI_TOKEN_TYPE_INSTRUCTION)
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memcpy(o, i, sizeof(*o));
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else
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copy_instruction(&o->FullInstruction, &i->FullInstruction);
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}
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struct i915_token_list* i915_optimize(const struct tgsi_token *tokens)
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{
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struct i915_token_list *out_tokens = MALLOC(sizeof(struct i915_token_list));
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struct tgsi_parse_context parse;
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int i = 0;
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2011-07-06 17:18:32 -06:00
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out_tokens->NumTokens = 0;
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2011-07-04 20:21:37 -07:00
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/* Count the tokens */
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tgsi_parse_init( &parse, tokens );
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while( !tgsi_parse_end_of_tokens( &parse ) ) {
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tgsi_parse_token( &parse );
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out_tokens->NumTokens++;
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}
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tgsi_parse_free (&parse);
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/* Allocate our tokens */
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out_tokens->Tokens = MALLOC(sizeof(union i915_full_token) * out_tokens->NumTokens);
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tgsi_parse_init( &parse, tokens );
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while( !tgsi_parse_end_of_tokens( &parse ) ) {
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tgsi_parse_token( &parse );
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copy_token(&out_tokens->Tokens[i] , &parse.FullToken);
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if (i > 0)
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2011-07-07 00:15:05 -07:00
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i915_fpc_optimize_mov_after_alu(&out_tokens->Tokens[i-1], &out_tokens->Tokens[i]);
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2011-07-04 20:21:37 -07:00
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i++;
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}
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tgsi_parse_free (&parse);
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return out_tokens;
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}
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void i915_optimize_free(struct i915_token_list* tokens)
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{
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free(tokens->Tokens);
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free(tokens);
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}
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