2015-08-17 16:17:07 -07:00
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/*
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* Copyright © 2015 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*/
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#include <assert.h>
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#include <stdbool.h>
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#include <string.h>
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#include <unistd.h>
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#include <fcntl.h>
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#include "anv_private.h"
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VkResult gen8_CreateDynamicRasterState(
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VkDevice _device,
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const VkDynamicRasterStateCreateInfo* pCreateInfo,
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VkDynamicRasterState* pState)
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{
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ANV_FROM_HANDLE(anv_device, device, _device);
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struct anv_dynamic_rs_state *state;
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assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_DYNAMIC_RASTER_STATE_CREATE_INFO);
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state = anv_device_alloc(device, sizeof(*state), 8,
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VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
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if (state == NULL)
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return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
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struct GEN8_3DSTATE_SF sf = {
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GEN8_3DSTATE_SF_header,
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.LineWidth = pCreateInfo->lineWidth,
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};
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2015-08-20 22:41:22 -07:00
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GEN8_3DSTATE_SF_pack(NULL, state->gen8.sf, &sf);
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2015-08-17 16:17:07 -07:00
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bool enable_bias = pCreateInfo->depthBias != 0.0f ||
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pCreateInfo->slopeScaledDepthBias != 0.0f;
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struct GEN8_3DSTATE_RASTER raster = {
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.GlobalDepthOffsetEnableSolid = enable_bias,
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.GlobalDepthOffsetEnableWireframe = enable_bias,
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.GlobalDepthOffsetEnablePoint = enable_bias,
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.GlobalDepthOffsetConstant = pCreateInfo->depthBias,
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.GlobalDepthOffsetScale = pCreateInfo->slopeScaledDepthBias,
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.GlobalDepthOffsetClamp = pCreateInfo->depthBiasClamp
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};
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2015-08-20 22:41:22 -07:00
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GEN8_3DSTATE_RASTER_pack(NULL, state->gen8.raster, &raster);
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2015-08-17 16:17:07 -07:00
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*pState = anv_dynamic_rs_state_to_handle(state);
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return VK_SUCCESS;
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}
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void
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gen8_fill_buffer_surface_state(void *state, const struct anv_format *format,
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uint32_t offset, uint32_t range)
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{
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/* This assumes RGBA float format. */
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uint32_t stride = 4;
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uint32_t num_elements = range / stride;
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struct GEN8_RENDER_SURFACE_STATE surface_state = {
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.SurfaceType = SURFTYPE_BUFFER,
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.SurfaceArray = false,
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.SurfaceFormat = format->surface_format,
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.SurfaceVerticalAlignment = VALIGN4,
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.SurfaceHorizontalAlignment = HALIGN4,
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.TileMode = LINEAR,
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.SamplerL2BypassModeDisable = true,
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.RenderCacheReadWriteMode = WriteOnlyCache,
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.MemoryObjectControlState = GEN8_MOCS,
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.Height = (num_elements >> 7) & 0x3fff,
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.Width = num_elements & 0x7f,
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.Depth = (num_elements >> 21) & 0x3f,
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.SurfacePitch = stride - 1,
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.NumberofMultisamples = MULTISAMPLECOUNT_1,
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.ShaderChannelSelectRed = SCS_RED,
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.ShaderChannelSelectGreen = SCS_GREEN,
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.ShaderChannelSelectBlue = SCS_BLUE,
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.ShaderChannelSelectAlpha = SCS_ALPHA,
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/* FIXME: We assume that the image must be bound at this time. */
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.SurfaceBaseAddress = { NULL, offset },
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};
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GEN8_RENDER_SURFACE_STATE_pack(NULL, state, &surface_state);
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}
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VkResult gen8_CreateBufferView(
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VkDevice _device,
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const VkBufferViewCreateInfo* pCreateInfo,
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VkBufferView* pView)
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{
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ANV_FROM_HANDLE(anv_device, device, _device);
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struct anv_buffer_view *view;
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VkResult result;
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result = anv_buffer_view_create(device, pCreateInfo, &view);
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if (result != VK_SUCCESS)
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return result;
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const struct anv_format *format =
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anv_format_for_vk_format(pCreateInfo->format);
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gen8_fill_buffer_surface_state(view->view.surface_state.map, format,
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view->view.offset, pCreateInfo->range);
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*pView = anv_buffer_view_to_handle(view);
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return VK_SUCCESS;
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}
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2015-08-19 21:36:57 -07:00
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static const uint8_t anv_halign[] = {
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[4] = HALIGN4,
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[8] = HALIGN8,
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[16] = HALIGN16,
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};
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static const uint8_t anv_valign[] = {
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[4] = VALIGN4,
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[8] = VALIGN8,
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[16] = VALIGN16,
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};
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void
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gen8_image_view_init(struct anv_image_view *iview,
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struct anv_device *device,
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const VkImageViewCreateInfo* pCreateInfo,
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struct anv_cmd_buffer *cmd_buffer)
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{
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ANV_FROM_HANDLE(anv_image, image, pCreateInfo->image);
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const VkImageSubresourceRange *range = &pCreateInfo->subresourceRange;
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struct anv_surface_view *view = &iview->view;
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struct anv_surface *surface;
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const struct anv_format *format_info =
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anv_format_for_vk_format(pCreateInfo->format);
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const struct anv_image_view_info *view_type_info =
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anv_image_view_info_for_vk_image_view_type(pCreateInfo->viewType);
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if (pCreateInfo->viewType != VK_IMAGE_VIEW_TYPE_2D)
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anv_finishme("non-2D image views");
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switch (pCreateInfo->subresourceRange.aspect) {
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case VK_IMAGE_ASPECT_STENCIL:
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anv_finishme("stencil image views");
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abort();
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break;
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case VK_IMAGE_ASPECT_DEPTH:
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case VK_IMAGE_ASPECT_COLOR:
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view->offset = image->offset;
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surface = &image->primary_surface;
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break;
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default:
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unreachable("");
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break;
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}
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view->bo = image->bo;
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view->offset = image->offset + surface->offset;
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view->format = format_info;
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iview->extent = (VkExtent3D) {
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.width = anv_minify(image->extent.width, range->baseMipLevel),
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.height = anv_minify(image->extent.height, range->baseMipLevel),
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.depth = anv_minify(image->extent.depth, range->baseMipLevel),
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};
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uint32_t depth = 1;
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if (range->arraySize > 1) {
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depth = range->arraySize;
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} else if (image->extent.depth > 1) {
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depth = image->extent.depth;
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}
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static const uint32_t vk_to_gen_swizzle[] = {
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[VK_CHANNEL_SWIZZLE_ZERO] = SCS_ZERO,
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[VK_CHANNEL_SWIZZLE_ONE] = SCS_ONE,
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[VK_CHANNEL_SWIZZLE_R] = SCS_RED,
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[VK_CHANNEL_SWIZZLE_G] = SCS_GREEN,
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[VK_CHANNEL_SWIZZLE_B] = SCS_BLUE,
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[VK_CHANNEL_SWIZZLE_A] = SCS_ALPHA
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};
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struct GEN8_RENDER_SURFACE_STATE surface_state = {
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.SurfaceType = view_type_info->surface_type,
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.SurfaceArray = image->array_size > 1,
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.SurfaceFormat = format_info->surface_format,
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.SurfaceVerticalAlignment = anv_valign[surface->v_align],
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.SurfaceHorizontalAlignment = anv_halign[surface->h_align],
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.TileMode = surface->tile_mode,
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.VerticalLineStride = 0,
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.VerticalLineStrideOffset = 0,
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.SamplerL2BypassModeDisable = true,
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.RenderCacheReadWriteMode = WriteOnlyCache,
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.MemoryObjectControlState = GEN8_MOCS,
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/* The driver sets BaseMipLevel in SAMPLER_STATE, not here in
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* RENDER_SURFACE_STATE. The Broadwell PRM says "it is illegal to have
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* both Base Mip Level fields nonzero".
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*/
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.BaseMipLevel = 0.0,
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.SurfaceQPitch = surface->qpitch >> 2,
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.Height = image->extent.height - 1,
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.Width = image->extent.width - 1,
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.Depth = depth - 1,
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.SurfacePitch = surface->stride - 1,
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.MinimumArrayElement = range->baseArraySlice,
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.NumberofMultisamples = MULTISAMPLECOUNT_1,
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.XOffset = 0,
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.YOffset = 0,
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/* For sampler surfaces, the hardware interprets field MIPCount/LOD as
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* MIPCount. The range of levels accessible by the sampler engine is
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* [SurfaceMinLOD, SurfaceMinLOD + MIPCountLOD].
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*/
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.MIPCountLOD = range->mipLevels - 1,
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.SurfaceMinLOD = range->baseMipLevel,
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.AuxiliarySurfaceMode = AUX_NONE,
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.RedClearColor = 0,
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.GreenClearColor = 0,
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.BlueClearColor = 0,
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.AlphaClearColor = 0,
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.ShaderChannelSelectRed = vk_to_gen_swizzle[pCreateInfo->channels.r],
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.ShaderChannelSelectGreen = vk_to_gen_swizzle[pCreateInfo->channels.g],
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.ShaderChannelSelectBlue = vk_to_gen_swizzle[pCreateInfo->channels.b],
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.ShaderChannelSelectAlpha = vk_to_gen_swizzle[pCreateInfo->channels.a],
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.ResourceMinLOD = 0.0,
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.SurfaceBaseAddress = { NULL, view->offset },
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};
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if (cmd_buffer) {
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view->surface_state =
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anv_state_stream_alloc(&cmd_buffer->surface_state_stream, 64, 64);
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} else {
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view->surface_state =
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anv_state_pool_alloc(&device->surface_state_pool, 64, 64);
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}
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GEN8_RENDER_SURFACE_STATE_pack(NULL, view->surface_state.map, &surface_state);
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}
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2015-08-19 22:19:21 -07:00
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void
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gen8_color_attachment_view_init(struct anv_color_attachment_view *aview,
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struct anv_device *device,
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const VkAttachmentViewCreateInfo* pCreateInfo,
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struct anv_cmd_buffer *cmd_buffer)
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{
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ANV_FROM_HANDLE(anv_image, image, pCreateInfo->image);
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struct anv_surface_view *view = &aview->view;
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struct anv_surface *surface = &image->primary_surface;
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const struct anv_format *format_info =
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anv_format_for_vk_format(pCreateInfo->format);
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aview->base.attachment_type = ANV_ATTACHMENT_VIEW_TYPE_COLOR;
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anv_assert(pCreateInfo->arraySize > 0);
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anv_assert(pCreateInfo->mipLevel < image->levels);
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anv_assert(pCreateInfo->baseArraySlice + pCreateInfo->arraySize <= image->array_size);
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view->bo = image->bo;
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view->offset = image->offset + surface->offset;
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view->format = anv_format_for_vk_format(pCreateInfo->format);
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aview->base.extent = (VkExtent3D) {
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.width = anv_minify(image->extent.width, pCreateInfo->mipLevel),
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.height = anv_minify(image->extent.height, pCreateInfo->mipLevel),
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.depth = anv_minify(image->extent.depth, pCreateInfo->mipLevel),
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};
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uint32_t depth = 1;
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if (pCreateInfo->arraySize > 1) {
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depth = pCreateInfo->arraySize;
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} else if (image->extent.depth > 1) {
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depth = image->extent.depth;
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}
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if (cmd_buffer) {
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view->surface_state =
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anv_state_stream_alloc(&cmd_buffer->surface_state_stream, 64, 64);
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} else {
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view->surface_state =
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anv_state_pool_alloc(&device->surface_state_pool, 64, 64);
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}
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struct GEN8_RENDER_SURFACE_STATE surface_state = {
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.SurfaceType = SURFTYPE_2D,
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.SurfaceArray = image->array_size > 1,
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.SurfaceFormat = format_info->surface_format,
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.SurfaceVerticalAlignment = anv_valign[surface->v_align],
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.SurfaceHorizontalAlignment = anv_halign[surface->h_align],
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.TileMode = surface->tile_mode,
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.VerticalLineStride = 0,
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.VerticalLineStrideOffset = 0,
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.SamplerL2BypassModeDisable = true,
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.RenderCacheReadWriteMode = WriteOnlyCache,
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.MemoryObjectControlState = GEN8_MOCS,
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/* The driver sets BaseMipLevel in SAMPLER_STATE, not here in
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* RENDER_SURFACE_STATE. The Broadwell PRM says "it is illegal to have
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* both Base Mip Level fields nonzero".
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*/
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.BaseMipLevel = 0.0,
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.SurfaceQPitch = surface->qpitch >> 2,
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.Height = image->extent.height - 1,
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.Width = image->extent.width - 1,
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.Depth = depth - 1,
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.SurfacePitch = surface->stride - 1,
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.MinimumArrayElement = pCreateInfo->baseArraySlice,
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.NumberofMultisamples = MULTISAMPLECOUNT_1,
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.XOffset = 0,
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.YOffset = 0,
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/* For render target surfaces, the hardware interprets field MIPCount/LOD as
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* LOD. The Broadwell PRM says:
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*
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* MIPCountLOD defines the LOD that will be rendered into.
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* SurfaceMinLOD is ignored.
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*/
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.SurfaceMinLOD = 0,
|
|
|
|
.MIPCountLOD = pCreateInfo->mipLevel,
|
|
|
|
|
|
|
|
.AuxiliarySurfaceMode = AUX_NONE,
|
|
|
|
.RedClearColor = 0,
|
|
|
|
.GreenClearColor = 0,
|
|
|
|
.BlueClearColor = 0,
|
|
|
|
.AlphaClearColor = 0,
|
|
|
|
.ShaderChannelSelectRed = SCS_RED,
|
|
|
|
.ShaderChannelSelectGreen = SCS_GREEN,
|
|
|
|
.ShaderChannelSelectBlue = SCS_BLUE,
|
|
|
|
.ShaderChannelSelectAlpha = SCS_ALPHA,
|
|
|
|
.ResourceMinLOD = 0.0,
|
|
|
|
.SurfaceBaseAddress = { NULL, view->offset },
|
|
|
|
};
|
|
|
|
|
|
|
|
GEN8_RENDER_SURFACE_STATE_pack(NULL, view->surface_state.map, &surface_state);
|
|
|
|
}
|
|
|
|
|
2015-08-17 16:17:07 -07:00
|
|
|
VkResult gen8_CreateSampler(
|
|
|
|
VkDevice _device,
|
|
|
|
const VkSamplerCreateInfo* pCreateInfo,
|
|
|
|
VkSampler* pSampler)
|
|
|
|
{
|
|
|
|
ANV_FROM_HANDLE(anv_device, device, _device);
|
|
|
|
struct anv_sampler *sampler;
|
|
|
|
uint32_t mag_filter, min_filter, max_anisotropy;
|
|
|
|
|
|
|
|
assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_SAMPLER_CREATE_INFO);
|
|
|
|
|
|
|
|
sampler = anv_device_alloc(device, sizeof(*sampler), 8,
|
|
|
|
VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
|
|
|
|
if (!sampler)
|
|
|
|
return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
|
|
|
|
|
|
|
|
static const uint32_t vk_to_gen_tex_filter[] = {
|
|
|
|
[VK_TEX_FILTER_NEAREST] = MAPFILTER_NEAREST,
|
|
|
|
[VK_TEX_FILTER_LINEAR] = MAPFILTER_LINEAR
|
|
|
|
};
|
|
|
|
|
|
|
|
static const uint32_t vk_to_gen_mipmap_mode[] = {
|
|
|
|
[VK_TEX_MIPMAP_MODE_BASE] = MIPFILTER_NONE,
|
|
|
|
[VK_TEX_MIPMAP_MODE_NEAREST] = MIPFILTER_NEAREST,
|
|
|
|
[VK_TEX_MIPMAP_MODE_LINEAR] = MIPFILTER_LINEAR
|
|
|
|
};
|
|
|
|
|
|
|
|
static const uint32_t vk_to_gen_tex_address[] = {
|
|
|
|
[VK_TEX_ADDRESS_WRAP] = TCM_WRAP,
|
|
|
|
[VK_TEX_ADDRESS_MIRROR] = TCM_MIRROR,
|
|
|
|
[VK_TEX_ADDRESS_CLAMP] = TCM_CLAMP,
|
|
|
|
[VK_TEX_ADDRESS_MIRROR_ONCE] = TCM_MIRROR_ONCE,
|
|
|
|
[VK_TEX_ADDRESS_CLAMP_BORDER] = TCM_CLAMP_BORDER,
|
|
|
|
};
|
|
|
|
|
|
|
|
static const uint32_t vk_to_gen_compare_op[] = {
|
|
|
|
[VK_COMPARE_OP_NEVER] = PREFILTEROPNEVER,
|
|
|
|
[VK_COMPARE_OP_LESS] = PREFILTEROPLESS,
|
|
|
|
[VK_COMPARE_OP_EQUAL] = PREFILTEROPEQUAL,
|
|
|
|
[VK_COMPARE_OP_LESS_EQUAL] = PREFILTEROPLEQUAL,
|
|
|
|
[VK_COMPARE_OP_GREATER] = PREFILTEROPGREATER,
|
|
|
|
[VK_COMPARE_OP_NOT_EQUAL] = PREFILTEROPNOTEQUAL,
|
|
|
|
[VK_COMPARE_OP_GREATER_EQUAL] = PREFILTEROPGEQUAL,
|
|
|
|
[VK_COMPARE_OP_ALWAYS] = PREFILTEROPALWAYS,
|
|
|
|
};
|
|
|
|
|
|
|
|
if (pCreateInfo->maxAnisotropy > 1) {
|
|
|
|
mag_filter = MAPFILTER_ANISOTROPIC;
|
|
|
|
min_filter = MAPFILTER_ANISOTROPIC;
|
|
|
|
max_anisotropy = (pCreateInfo->maxAnisotropy - 2) / 2;
|
|
|
|
} else {
|
|
|
|
mag_filter = vk_to_gen_tex_filter[pCreateInfo->magFilter];
|
|
|
|
min_filter = vk_to_gen_tex_filter[pCreateInfo->minFilter];
|
|
|
|
max_anisotropy = RATIO21;
|
|
|
|
}
|
|
|
|
|
|
|
|
struct GEN8_SAMPLER_STATE sampler_state = {
|
|
|
|
.SamplerDisable = false,
|
|
|
|
.TextureBorderColorMode = DX10OGL,
|
|
|
|
.LODPreClampMode = 0,
|
|
|
|
.BaseMipLevel = 0.0,
|
|
|
|
.MipModeFilter = vk_to_gen_mipmap_mode[pCreateInfo->mipMode],
|
|
|
|
.MagModeFilter = mag_filter,
|
|
|
|
.MinModeFilter = min_filter,
|
|
|
|
.TextureLODBias = pCreateInfo->mipLodBias * 256,
|
|
|
|
.AnisotropicAlgorithm = EWAApproximation,
|
|
|
|
.MinLOD = pCreateInfo->minLod,
|
|
|
|
.MaxLOD = pCreateInfo->maxLod,
|
|
|
|
.ChromaKeyEnable = 0,
|
|
|
|
.ChromaKeyIndex = 0,
|
|
|
|
.ChromaKeyMode = 0,
|
|
|
|
.ShadowFunction = vk_to_gen_compare_op[pCreateInfo->compareOp],
|
|
|
|
.CubeSurfaceControlMode = 0,
|
|
|
|
|
|
|
|
.IndirectStatePointer =
|
|
|
|
device->border_colors.offset +
|
|
|
|
pCreateInfo->borderColor * sizeof(float) * 4,
|
|
|
|
|
|
|
|
.LODClampMagnificationMode = MIPNONE,
|
|
|
|
.MaximumAnisotropy = max_anisotropy,
|
|
|
|
.RAddressMinFilterRoundingEnable = 0,
|
|
|
|
.RAddressMagFilterRoundingEnable = 0,
|
|
|
|
.VAddressMinFilterRoundingEnable = 0,
|
|
|
|
.VAddressMagFilterRoundingEnable = 0,
|
|
|
|
.UAddressMinFilterRoundingEnable = 0,
|
|
|
|
.UAddressMagFilterRoundingEnable = 0,
|
|
|
|
.TrilinearFilterQuality = 0,
|
|
|
|
.NonnormalizedCoordinateEnable = 0,
|
|
|
|
.TCXAddressControlMode = vk_to_gen_tex_address[pCreateInfo->addressU],
|
|
|
|
.TCYAddressControlMode = vk_to_gen_tex_address[pCreateInfo->addressV],
|
|
|
|
.TCZAddressControlMode = vk_to_gen_tex_address[pCreateInfo->addressW],
|
|
|
|
};
|
|
|
|
|
|
|
|
GEN8_SAMPLER_STATE_pack(NULL, sampler->state, &sampler_state);
|
|
|
|
|
|
|
|
*pSampler = anv_sampler_to_handle(sampler);
|
|
|
|
|
|
|
|
return VK_SUCCESS;
|
|
|
|
}
|
|
|
|
|
|
|
|
VkResult gen8_CreateDynamicDepthStencilState(
|
|
|
|
VkDevice _device,
|
|
|
|
const VkDynamicDepthStencilStateCreateInfo* pCreateInfo,
|
|
|
|
VkDynamicDepthStencilState* pState)
|
|
|
|
{
|
|
|
|
ANV_FROM_HANDLE(anv_device, device, _device);
|
|
|
|
struct anv_dynamic_ds_state *state;
|
|
|
|
|
|
|
|
assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_DYNAMIC_DEPTH_STENCIL_STATE_CREATE_INFO);
|
|
|
|
|
|
|
|
state = anv_device_alloc(device, sizeof(*state), 8,
|
|
|
|
VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
|
|
|
|
if (state == NULL)
|
|
|
|
return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
|
|
|
|
|
|
|
|
struct GEN8_3DSTATE_WM_DEPTH_STENCIL wm_depth_stencil = {
|
|
|
|
GEN8_3DSTATE_WM_DEPTH_STENCIL_header,
|
|
|
|
|
|
|
|
/* Is this what we need to do? */
|
|
|
|
.StencilBufferWriteEnable = pCreateInfo->stencilWriteMask != 0,
|
|
|
|
|
|
|
|
.StencilTestMask = pCreateInfo->stencilReadMask & 0xff,
|
|
|
|
.StencilWriteMask = pCreateInfo->stencilWriteMask & 0xff,
|
|
|
|
|
|
|
|
.BackfaceStencilTestMask = pCreateInfo->stencilReadMask & 0xff,
|
|
|
|
.BackfaceStencilWriteMask = pCreateInfo->stencilWriteMask & 0xff,
|
|
|
|
};
|
|
|
|
|
2015-08-20 22:41:22 -07:00
|
|
|
GEN8_3DSTATE_WM_DEPTH_STENCIL_pack(NULL, state->gen8.wm_depth_stencil,
|
2015-08-17 16:17:07 -07:00
|
|
|
&wm_depth_stencil);
|
|
|
|
|
|
|
|
struct GEN8_COLOR_CALC_STATE color_calc_state = {
|
|
|
|
.StencilReferenceValue = pCreateInfo->stencilFrontRef,
|
|
|
|
.BackFaceStencilReferenceValue = pCreateInfo->stencilBackRef
|
|
|
|
};
|
|
|
|
|
2015-08-20 22:41:22 -07:00
|
|
|
GEN8_COLOR_CALC_STATE_pack(NULL, state->gen8.color_calc_state, &color_calc_state);
|
2015-08-17 16:17:07 -07:00
|
|
|
|
|
|
|
*pState = anv_dynamic_ds_state_to_handle(state);
|
|
|
|
|
|
|
|
return VK_SUCCESS;
|
|
|
|
}
|