2015-08-13 21:05:47 -07:00
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/*
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* Copyright © 2015 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*/
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#include <assert.h>
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#include <stdbool.h>
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#include <string.h>
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#include <unistd.h>
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#include <fcntl.h>
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#include "anv_private.h"
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2015-08-14 09:30:41 -07:00
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static void
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emit_vertex_input(struct anv_pipeline *pipeline,
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const VkPipelineVertexInputStateCreateInfo *info)
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{
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const uint32_t num_dwords = 1 + info->attributeCount * 2;
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uint32_t *p;
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bool instancing_enable[32];
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pipeline->vb_used = 0;
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for (uint32_t i = 0; i < info->bindingCount; i++) {
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const VkVertexInputBindingDescription *desc =
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&info->pVertexBindingDescriptions[i];
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pipeline->vb_used |= 1 << desc->binding;
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pipeline->binding_stride[desc->binding] = desc->strideInBytes;
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/* Step rate is programmed per vertex element (attribute), not
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* binding. Set up a map of which bindings step per instance, for
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* reference by vertex element setup. */
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switch (desc->stepRate) {
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default:
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case VK_VERTEX_INPUT_STEP_RATE_VERTEX:
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instancing_enable[desc->binding] = false;
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break;
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case VK_VERTEX_INPUT_STEP_RATE_INSTANCE:
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instancing_enable[desc->binding] = true;
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break;
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}
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}
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p = anv_batch_emitn(&pipeline->batch, num_dwords,
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GEN8_3DSTATE_VERTEX_ELEMENTS);
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for (uint32_t i = 0; i < info->attributeCount; i++) {
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const VkVertexInputAttributeDescription *desc =
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&info->pVertexAttributeDescriptions[i];
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const struct anv_format *format = anv_format_for_vk_format(desc->format);
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struct GEN8_VERTEX_ELEMENT_STATE element = {
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.VertexBufferIndex = desc->binding,
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.Valid = true,
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.SourceElementFormat = format->surface_format,
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.EdgeFlagEnable = false,
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.SourceElementOffset = desc->offsetInBytes,
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.Component0Control = VFCOMP_STORE_SRC,
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.Component1Control = format->num_channels >= 2 ? VFCOMP_STORE_SRC : VFCOMP_STORE_0,
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.Component2Control = format->num_channels >= 3 ? VFCOMP_STORE_SRC : VFCOMP_STORE_0,
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.Component3Control = format->num_channels >= 4 ? VFCOMP_STORE_SRC : VFCOMP_STORE_1_FP
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};
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GEN8_VERTEX_ELEMENT_STATE_pack(NULL, &p[1 + i * 2], &element);
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anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_VF_INSTANCING,
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.InstancingEnable = instancing_enable[desc->binding],
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.VertexElementIndex = i,
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/* Vulkan so far doesn't have an instance divisor, so
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* this is always 1 (ignored if not instancing). */
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.InstanceDataStepRate = 1);
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}
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anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_VF_SGVS,
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.VertexIDEnable = pipeline->vs_prog_data.uses_vertexid,
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.VertexIDComponentNumber = 2,
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.VertexIDElementOffset = info->bindingCount,
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.InstanceIDEnable = pipeline->vs_prog_data.uses_instanceid,
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.InstanceIDComponentNumber = 3,
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.InstanceIDElementOffset = info->bindingCount);
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}
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static void
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emit_ia_state(struct anv_pipeline *pipeline,
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const VkPipelineInputAssemblyStateCreateInfo *info,
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const struct anv_graphics_pipeline_create_info *extra)
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{
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static const uint32_t vk_to_gen_primitive_type[] = {
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[VK_PRIMITIVE_TOPOLOGY_POINT_LIST] = _3DPRIM_POINTLIST,
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[VK_PRIMITIVE_TOPOLOGY_LINE_LIST] = _3DPRIM_LINELIST,
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[VK_PRIMITIVE_TOPOLOGY_LINE_STRIP] = _3DPRIM_LINESTRIP,
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[VK_PRIMITIVE_TOPOLOGY_TRIANGLE_LIST] = _3DPRIM_TRILIST,
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[VK_PRIMITIVE_TOPOLOGY_TRIANGLE_STRIP] = _3DPRIM_TRISTRIP,
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[VK_PRIMITIVE_TOPOLOGY_TRIANGLE_FAN] = _3DPRIM_TRIFAN,
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[VK_PRIMITIVE_TOPOLOGY_LINE_LIST_ADJ] = _3DPRIM_LINELIST_ADJ,
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[VK_PRIMITIVE_TOPOLOGY_LINE_STRIP_ADJ] = _3DPRIM_LINESTRIP_ADJ,
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[VK_PRIMITIVE_TOPOLOGY_TRIANGLE_LIST_ADJ] = _3DPRIM_TRILIST_ADJ,
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[VK_PRIMITIVE_TOPOLOGY_TRIANGLE_STRIP_ADJ] = _3DPRIM_TRISTRIP_ADJ,
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[VK_PRIMITIVE_TOPOLOGY_PATCH] = _3DPRIM_PATCHLIST_1
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};
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uint32_t topology = vk_to_gen_primitive_type[info->topology];
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if (extra && extra->use_rectlist)
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topology = _3DPRIM_RECTLIST;
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struct GEN8_3DSTATE_VF vf = {
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GEN8_3DSTATE_VF_header,
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.IndexedDrawCutIndexEnable = info->primitiveRestartEnable,
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};
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GEN8_3DSTATE_VF_pack(NULL, pipeline->state_vf, &vf);
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anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_VF_TOPOLOGY,
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.PrimitiveTopologyType = topology);
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}
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static void
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emit_rs_state(struct anv_pipeline *pipeline,
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const VkPipelineRasterStateCreateInfo *info,
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const struct anv_graphics_pipeline_create_info *extra)
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{
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static const uint32_t vk_to_gen_cullmode[] = {
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[VK_CULL_MODE_NONE] = CULLMODE_NONE,
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[VK_CULL_MODE_FRONT] = CULLMODE_FRONT,
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[VK_CULL_MODE_BACK] = CULLMODE_BACK,
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[VK_CULL_MODE_FRONT_AND_BACK] = CULLMODE_BOTH
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};
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static const uint32_t vk_to_gen_fillmode[] = {
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[VK_FILL_MODE_POINTS] = RASTER_POINT,
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[VK_FILL_MODE_WIREFRAME] = RASTER_WIREFRAME,
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[VK_FILL_MODE_SOLID] = RASTER_SOLID
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};
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static const uint32_t vk_to_gen_front_face[] = {
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[VK_FRONT_FACE_CCW] = CounterClockwise,
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[VK_FRONT_FACE_CW] = Clockwise
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};
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struct GEN8_3DSTATE_SF sf = {
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GEN8_3DSTATE_SF_header,
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.ViewportTransformEnable = !(extra && extra->disable_viewport),
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.TriangleStripListProvokingVertexSelect = 0,
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.LineStripListProvokingVertexSelect = 0,
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.TriangleFanProvokingVertexSelect = 0,
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.PointWidthSource = pipeline->writes_point_size ? Vertex : State,
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.PointWidth = 1.0,
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};
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/* FINISHME: VkBool32 rasterizerDiscardEnable; */
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GEN8_3DSTATE_SF_pack(NULL, pipeline->state_sf, &sf);
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struct GEN8_3DSTATE_RASTER raster = {
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GEN8_3DSTATE_RASTER_header,
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.FrontWinding = vk_to_gen_front_face[info->frontFace],
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.CullMode = vk_to_gen_cullmode[info->cullMode],
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.FrontFaceFillMode = vk_to_gen_fillmode[info->fillMode],
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.BackFaceFillMode = vk_to_gen_fillmode[info->fillMode],
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.ScissorRectangleEnable = !(extra && extra->disable_scissor),
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.ViewportZClipTestEnable = info->depthClipEnable
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};
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GEN8_3DSTATE_RASTER_pack(NULL, pipeline->state_raster, &raster);
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anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_SBE,
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.ForceVertexURBEntryReadLength = false,
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.ForceVertexURBEntryReadOffset = false,
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.PointSpriteTextureCoordinateOrigin = UPPERLEFT,
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.NumberofSFOutputAttributes =
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pipeline->wm_prog_data.num_varying_inputs);
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}
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static void
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emit_cb_state(struct anv_pipeline *pipeline,
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const VkPipelineColorBlendStateCreateInfo *info)
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{
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struct anv_device *device = pipeline->device;
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static const uint32_t vk_to_gen_logic_op[] = {
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[VK_LOGIC_OP_COPY] = LOGICOP_COPY,
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[VK_LOGIC_OP_CLEAR] = LOGICOP_CLEAR,
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[VK_LOGIC_OP_AND] = LOGICOP_AND,
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[VK_LOGIC_OP_AND_REVERSE] = LOGICOP_AND_REVERSE,
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[VK_LOGIC_OP_AND_INVERTED] = LOGICOP_AND_INVERTED,
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[VK_LOGIC_OP_NOOP] = LOGICOP_NOOP,
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[VK_LOGIC_OP_XOR] = LOGICOP_XOR,
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[VK_LOGIC_OP_OR] = LOGICOP_OR,
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[VK_LOGIC_OP_NOR] = LOGICOP_NOR,
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[VK_LOGIC_OP_EQUIV] = LOGICOP_EQUIV,
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[VK_LOGIC_OP_INVERT] = LOGICOP_INVERT,
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[VK_LOGIC_OP_OR_REVERSE] = LOGICOP_OR_REVERSE,
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[VK_LOGIC_OP_COPY_INVERTED] = LOGICOP_COPY_INVERTED,
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[VK_LOGIC_OP_OR_INVERTED] = LOGICOP_OR_INVERTED,
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[VK_LOGIC_OP_NAND] = LOGICOP_NAND,
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[VK_LOGIC_OP_SET] = LOGICOP_SET,
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};
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static const uint32_t vk_to_gen_blend[] = {
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[VK_BLEND_ZERO] = BLENDFACTOR_ZERO,
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[VK_BLEND_ONE] = BLENDFACTOR_ONE,
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[VK_BLEND_SRC_COLOR] = BLENDFACTOR_SRC_COLOR,
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[VK_BLEND_ONE_MINUS_SRC_COLOR] = BLENDFACTOR_INV_SRC_COLOR,
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[VK_BLEND_DEST_COLOR] = BLENDFACTOR_DST_COLOR,
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[VK_BLEND_ONE_MINUS_DEST_COLOR] = BLENDFACTOR_INV_DST_COLOR,
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[VK_BLEND_SRC_ALPHA] = BLENDFACTOR_SRC_ALPHA,
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[VK_BLEND_ONE_MINUS_SRC_ALPHA] = BLENDFACTOR_INV_SRC_ALPHA,
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[VK_BLEND_DEST_ALPHA] = BLENDFACTOR_DST_ALPHA,
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[VK_BLEND_ONE_MINUS_DEST_ALPHA] = BLENDFACTOR_INV_DST_ALPHA,
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[VK_BLEND_CONSTANT_COLOR] = BLENDFACTOR_CONST_COLOR,
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[VK_BLEND_ONE_MINUS_CONSTANT_COLOR] = BLENDFACTOR_INV_CONST_COLOR,
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[VK_BLEND_CONSTANT_ALPHA] = BLENDFACTOR_CONST_ALPHA,
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[VK_BLEND_ONE_MINUS_CONSTANT_ALPHA] = BLENDFACTOR_INV_CONST_ALPHA,
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[VK_BLEND_SRC_ALPHA_SATURATE] = BLENDFACTOR_SRC_ALPHA_SATURATE,
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[VK_BLEND_SRC1_COLOR] = BLENDFACTOR_SRC1_COLOR,
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[VK_BLEND_ONE_MINUS_SRC1_COLOR] = BLENDFACTOR_INV_SRC1_COLOR,
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[VK_BLEND_SRC1_ALPHA] = BLENDFACTOR_SRC1_ALPHA,
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[VK_BLEND_ONE_MINUS_SRC1_ALPHA] = BLENDFACTOR_INV_SRC1_ALPHA,
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};
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static const uint32_t vk_to_gen_blend_op[] = {
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[VK_BLEND_OP_ADD] = BLENDFUNCTION_ADD,
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[VK_BLEND_OP_SUBTRACT] = BLENDFUNCTION_SUBTRACT,
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[VK_BLEND_OP_REVERSE_SUBTRACT] = BLENDFUNCTION_REVERSE_SUBTRACT,
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[VK_BLEND_OP_MIN] = BLENDFUNCTION_MIN,
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[VK_BLEND_OP_MAX] = BLENDFUNCTION_MAX,
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};
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uint32_t num_dwords = GEN8_BLEND_STATE_length;
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pipeline->blend_state =
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anv_state_pool_alloc(&device->dynamic_state_pool, num_dwords * 4, 64);
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struct GEN8_BLEND_STATE blend_state = {
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.AlphaToCoverageEnable = info->alphaToCoverageEnable,
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};
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for (uint32_t i = 0; i < info->attachmentCount; i++) {
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const VkPipelineColorBlendAttachmentState *a = &info->pAttachments[i];
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blend_state.Entry[i] = (struct GEN8_BLEND_STATE_ENTRY) {
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.LogicOpEnable = info->logicOpEnable,
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.LogicOpFunction = vk_to_gen_logic_op[info->logicOp],
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.ColorBufferBlendEnable = a->blendEnable,
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.PreBlendSourceOnlyClampEnable = false,
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.PreBlendColorClampEnable = false,
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.PostBlendColorClampEnable = false,
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.SourceBlendFactor = vk_to_gen_blend[a->srcBlendColor],
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.DestinationBlendFactor = vk_to_gen_blend[a->destBlendColor],
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.ColorBlendFunction = vk_to_gen_blend_op[a->blendOpColor],
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.SourceAlphaBlendFactor = vk_to_gen_blend[a->srcBlendAlpha],
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.DestinationAlphaBlendFactor = vk_to_gen_blend[a->destBlendAlpha],
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.AlphaBlendFunction = vk_to_gen_blend_op[a->blendOpAlpha],
|
|
|
|
|
.WriteDisableAlpha = !(a->channelWriteMask & VK_CHANNEL_A_BIT),
|
|
|
|
|
.WriteDisableRed = !(a->channelWriteMask & VK_CHANNEL_R_BIT),
|
|
|
|
|
.WriteDisableGreen = !(a->channelWriteMask & VK_CHANNEL_G_BIT),
|
|
|
|
|
.WriteDisableBlue = !(a->channelWriteMask & VK_CHANNEL_B_BIT),
|
|
|
|
|
};
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
GEN8_BLEND_STATE_pack(NULL, pipeline->blend_state.map, &blend_state);
|
|
|
|
|
|
|
|
|
|
anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_BLEND_STATE_POINTERS,
|
|
|
|
|
.BlendStatePointer = pipeline->blend_state.offset,
|
|
|
|
|
.BlendStatePointerValid = true);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static const uint32_t vk_to_gen_compare_op[] = {
|
|
|
|
|
[VK_COMPARE_OP_NEVER] = COMPAREFUNCTION_NEVER,
|
|
|
|
|
[VK_COMPARE_OP_LESS] = COMPAREFUNCTION_LESS,
|
|
|
|
|
[VK_COMPARE_OP_EQUAL] = COMPAREFUNCTION_EQUAL,
|
|
|
|
|
[VK_COMPARE_OP_LESS_EQUAL] = COMPAREFUNCTION_LEQUAL,
|
|
|
|
|
[VK_COMPARE_OP_GREATER] = COMPAREFUNCTION_GREATER,
|
|
|
|
|
[VK_COMPARE_OP_NOT_EQUAL] = COMPAREFUNCTION_NOTEQUAL,
|
|
|
|
|
[VK_COMPARE_OP_GREATER_EQUAL] = COMPAREFUNCTION_GEQUAL,
|
|
|
|
|
[VK_COMPARE_OP_ALWAYS] = COMPAREFUNCTION_ALWAYS,
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
static const uint32_t vk_to_gen_stencil_op[] = {
|
|
|
|
|
[VK_STENCIL_OP_KEEP] = 0,
|
|
|
|
|
[VK_STENCIL_OP_ZERO] = 0,
|
|
|
|
|
[VK_STENCIL_OP_REPLACE] = 0,
|
|
|
|
|
[VK_STENCIL_OP_INC_CLAMP] = 0,
|
|
|
|
|
[VK_STENCIL_OP_DEC_CLAMP] = 0,
|
|
|
|
|
[VK_STENCIL_OP_INVERT] = 0,
|
|
|
|
|
[VK_STENCIL_OP_INC_WRAP] = 0,
|
|
|
|
|
[VK_STENCIL_OP_DEC_WRAP] = 0
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
emit_ds_state(struct anv_pipeline *pipeline,
|
|
|
|
|
const VkPipelineDepthStencilStateCreateInfo *info)
|
|
|
|
|
{
|
|
|
|
|
if (info == NULL) {
|
|
|
|
|
/* We're going to OR this together with the dynamic state. We need
|
|
|
|
|
* to make sure it's initialized to something useful.
|
|
|
|
|
*/
|
|
|
|
|
memset(pipeline->state_wm_depth_stencil, 0,
|
|
|
|
|
sizeof(pipeline->state_wm_depth_stencil));
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* VkBool32 depthBoundsEnable; // optional (depth_bounds_test) */
|
|
|
|
|
|
|
|
|
|
struct GEN8_3DSTATE_WM_DEPTH_STENCIL wm_depth_stencil = {
|
|
|
|
|
.DepthTestEnable = info->depthTestEnable,
|
|
|
|
|
.DepthBufferWriteEnable = info->depthWriteEnable,
|
|
|
|
|
.DepthTestFunction = vk_to_gen_compare_op[info->depthCompareOp],
|
|
|
|
|
.DoubleSidedStencilEnable = true,
|
|
|
|
|
|
|
|
|
|
.StencilTestEnable = info->stencilTestEnable,
|
|
|
|
|
.StencilFailOp = vk_to_gen_stencil_op[info->front.stencilFailOp],
|
|
|
|
|
.StencilPassDepthPassOp = vk_to_gen_stencil_op[info->front.stencilPassOp],
|
|
|
|
|
.StencilPassDepthFailOp = vk_to_gen_stencil_op[info->front.stencilDepthFailOp],
|
|
|
|
|
.StencilTestFunction = vk_to_gen_compare_op[info->front.stencilCompareOp],
|
|
|
|
|
.BackfaceStencilFailOp = vk_to_gen_stencil_op[info->back.stencilFailOp],
|
|
|
|
|
.BackfaceStencilPassDepthPassOp = vk_to_gen_stencil_op[info->back.stencilPassOp],
|
|
|
|
|
.BackfaceStencilPassDepthFailOp =vk_to_gen_stencil_op[info->back.stencilDepthFailOp],
|
|
|
|
|
.BackfaceStencilTestFunction = vk_to_gen_compare_op[info->back.stencilCompareOp],
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
GEN8_3DSTATE_WM_DEPTH_STENCIL_pack(NULL, pipeline->state_wm_depth_stencil, &wm_depth_stencil);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
VkResult
|
|
|
|
|
gen8_graphics_pipeline_create(
|
|
|
|
|
VkDevice _device,
|
|
|
|
|
const VkGraphicsPipelineCreateInfo* pCreateInfo,
|
|
|
|
|
const struct anv_graphics_pipeline_create_info *extra,
|
|
|
|
|
VkPipeline* pPipeline)
|
|
|
|
|
{
|
|
|
|
|
ANV_FROM_HANDLE(anv_device, device, _device);
|
|
|
|
|
struct anv_pipeline *pipeline;
|
|
|
|
|
VkResult result;
|
|
|
|
|
uint32_t offset, length;
|
|
|
|
|
|
|
|
|
|
assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_GRAPHICS_PIPELINE_CREATE_INFO);
|
|
|
|
|
|
|
|
|
|
pipeline = anv_device_alloc(device, sizeof(*pipeline), 8,
|
|
|
|
|
VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
|
|
|
|
|
if (pipeline == NULL)
|
|
|
|
|
return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
|
|
|
|
|
|
|
|
|
|
pipeline->device = device;
|
|
|
|
|
pipeline->layout = anv_pipeline_layout_from_handle(pCreateInfo->layout);
|
|
|
|
|
memset(pipeline->shaders, 0, sizeof(pipeline->shaders));
|
|
|
|
|
|
|
|
|
|
result = anv_reloc_list_init(&pipeline->batch_relocs, device);
|
|
|
|
|
if (result != VK_SUCCESS) {
|
|
|
|
|
anv_device_free(device, pipeline);
|
|
|
|
|
return result;
|
|
|
|
|
}
|
|
|
|
|
pipeline->batch.next = pipeline->batch.start = pipeline->batch_data;
|
|
|
|
|
pipeline->batch.end = pipeline->batch.start + sizeof(pipeline->batch_data);
|
|
|
|
|
pipeline->batch.relocs = &pipeline->batch_relocs;
|
|
|
|
|
|
|
|
|
|
anv_state_stream_init(&pipeline->program_stream,
|
|
|
|
|
&device->instruction_block_pool);
|
|
|
|
|
|
|
|
|
|
for (uint32_t i = 0; i < pCreateInfo->stageCount; i++) {
|
|
|
|
|
pipeline->shaders[pCreateInfo->pStages[i].stage] =
|
|
|
|
|
anv_shader_from_handle(pCreateInfo->pStages[i].shader);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (pCreateInfo->pTessellationState)
|
|
|
|
|
anv_finishme("VK_STRUCTURE_TYPE_PIPELINE_TESSELLATION_STATE_CREATE_INFO");
|
|
|
|
|
if (pCreateInfo->pViewportState)
|
|
|
|
|
anv_finishme("VK_STRUCTURE_TYPE_PIPELINE_VIEWPORT_STATE_CREATE_INFO");
|
|
|
|
|
if (pCreateInfo->pMultisampleState)
|
|
|
|
|
anv_finishme("VK_STRUCTURE_TYPE_PIPELINE_MULTISAMPLE_STATE_CREATE_INFO");
|
|
|
|
|
|
|
|
|
|
pipeline->use_repclear = extra && extra->use_repclear;
|
|
|
|
|
|
|
|
|
|
anv_compiler_run(device->compiler, pipeline);
|
|
|
|
|
|
|
|
|
|
/* FIXME: The compiler dead-codes FS inputs when we don't have a VS, so we
|
|
|
|
|
* hard code this to num_attributes - 2. This is because the attributes
|
|
|
|
|
* include VUE header and position, which aren't counted as varying
|
|
|
|
|
* inputs. */
|
|
|
|
|
if (pipeline->vs_simd8 == NO_KERNEL) {
|
|
|
|
|
pipeline->wm_prog_data.num_varying_inputs =
|
|
|
|
|
pCreateInfo->pVertexInputState->attributeCount - 2;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
assert(pCreateInfo->pVertexInputState);
|
|
|
|
|
emit_vertex_input(pipeline, pCreateInfo->pVertexInputState);
|
|
|
|
|
assert(pCreateInfo->pInputAssemblyState);
|
|
|
|
|
emit_ia_state(pipeline, pCreateInfo->pInputAssemblyState, extra);
|
|
|
|
|
assert(pCreateInfo->pRasterState);
|
|
|
|
|
emit_rs_state(pipeline, pCreateInfo->pRasterState, extra);
|
|
|
|
|
emit_ds_state(pipeline, pCreateInfo->pDepthStencilState);
|
|
|
|
|
emit_cb_state(pipeline, pCreateInfo->pColorBlendState);
|
|
|
|
|
|
|
|
|
|
anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_VF_STATISTICS,
|
|
|
|
|
.StatisticsEnable = true);
|
|
|
|
|
anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_HS, .Enable = false);
|
|
|
|
|
anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_TE, .TEEnable = false);
|
|
|
|
|
anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_DS, .FunctionEnable = false);
|
|
|
|
|
anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_STREAMOUT, .SOFunctionEnable = false);
|
|
|
|
|
|
|
|
|
|
anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_VS,
|
|
|
|
|
.ConstantBufferOffset = 0,
|
|
|
|
|
.ConstantBufferSize = 4);
|
|
|
|
|
anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_GS,
|
|
|
|
|
.ConstantBufferOffset = 4,
|
|
|
|
|
.ConstantBufferSize = 4);
|
|
|
|
|
anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_PS,
|
|
|
|
|
.ConstantBufferOffset = 8,
|
|
|
|
|
.ConstantBufferSize = 4);
|
|
|
|
|
|
|
|
|
|
anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_WM_CHROMAKEY,
|
|
|
|
|
.ChromaKeyKillEnable = false);
|
|
|
|
|
anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_SBE_SWIZ);
|
|
|
|
|
anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_AA_LINE_PARAMETERS);
|
|
|
|
|
|
|
|
|
|
anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_CLIP,
|
|
|
|
|
.ClipEnable = true,
|
|
|
|
|
.ViewportXYClipTestEnable = !(extra && extra->disable_viewport),
|
|
|
|
|
.MinimumPointWidth = 0.125,
|
|
|
|
|
.MaximumPointWidth = 255.875);
|
|
|
|
|
|
|
|
|
|
anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_WM,
|
|
|
|
|
.StatisticsEnable = true,
|
|
|
|
|
.LineEndCapAntialiasingRegionWidth = _05pixels,
|
|
|
|
|
.LineAntialiasingRegionWidth = _10pixels,
|
|
|
|
|
.EarlyDepthStencilControl = NORMAL,
|
|
|
|
|
.ForceThreadDispatchEnable = NORMAL,
|
|
|
|
|
.PointRasterizationRule = RASTRULE_UPPER_RIGHT,
|
|
|
|
|
.BarycentricInterpolationMode =
|
|
|
|
|
pipeline->wm_prog_data.barycentric_interp_modes);
|
|
|
|
|
|
|
|
|
|
uint32_t samples = 1;
|
|
|
|
|
uint32_t log2_samples = __builtin_ffs(samples) - 1;
|
|
|
|
|
bool enable_sampling = samples > 1 ? true : false;
|
|
|
|
|
|
|
|
|
|
anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_MULTISAMPLE,
|
|
|
|
|
.PixelPositionOffsetEnable = enable_sampling,
|
|
|
|
|
.PixelLocation = CENTER,
|
|
|
|
|
.NumberofMultisamples = log2_samples);
|
|
|
|
|
|
|
|
|
|
anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_SAMPLE_MASK,
|
|
|
|
|
.SampleMask = 0xffff);
|
|
|
|
|
|
|
|
|
|
anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_URB_VS,
|
|
|
|
|
.VSURBStartingAddress = pipeline->urb.vs_start,
|
|
|
|
|
.VSURBEntryAllocationSize = pipeline->urb.vs_size - 1,
|
|
|
|
|
.VSNumberofURBEntries = pipeline->urb.nr_vs_entries);
|
|
|
|
|
|
|
|
|
|
anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_URB_GS,
|
|
|
|
|
.GSURBStartingAddress = pipeline->urb.gs_start,
|
|
|
|
|
.GSURBEntryAllocationSize = pipeline->urb.gs_size - 1,
|
|
|
|
|
.GSNumberofURBEntries = pipeline->urb.nr_gs_entries);
|
|
|
|
|
|
|
|
|
|
anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_URB_HS,
|
|
|
|
|
.HSURBStartingAddress = pipeline->urb.vs_start,
|
|
|
|
|
.HSURBEntryAllocationSize = 0,
|
|
|
|
|
.HSNumberofURBEntries = 0);
|
|
|
|
|
|
|
|
|
|
anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_URB_DS,
|
|
|
|
|
.DSURBStartingAddress = pipeline->urb.vs_start,
|
|
|
|
|
.DSURBEntryAllocationSize = 0,
|
|
|
|
|
.DSNumberofURBEntries = 0);
|
|
|
|
|
|
|
|
|
|
const struct brw_gs_prog_data *gs_prog_data = &pipeline->gs_prog_data;
|
|
|
|
|
offset = 1;
|
|
|
|
|
length = (gs_prog_data->base.vue_map.num_slots + 1) / 2 - offset;
|
|
|
|
|
|
|
|
|
|
if (pipeline->gs_vec4 == NO_KERNEL)
|
|
|
|
|
anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_GS, .Enable = false);
|
|
|
|
|
else
|
|
|
|
|
anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_GS,
|
|
|
|
|
.SingleProgramFlow = false,
|
|
|
|
|
.KernelStartPointer = pipeline->gs_vec4,
|
|
|
|
|
.VectorMaskEnable = Vmask,
|
|
|
|
|
.SamplerCount = 0,
|
|
|
|
|
.BindingTableEntryCount = 0,
|
|
|
|
|
.ExpectedVertexCount = pipeline->gs_vertex_count,
|
|
|
|
|
|
|
|
|
|
.ScratchSpaceBasePointer = pipeline->scratch_start[VK_SHADER_STAGE_GEOMETRY],
|
|
|
|
|
.PerThreadScratchSpace = ffs(gs_prog_data->base.base.total_scratch / 2048),
|
|
|
|
|
|
|
|
|
|
.OutputVertexSize = gs_prog_data->output_vertex_size_hwords * 2 - 1,
|
|
|
|
|
.OutputTopology = gs_prog_data->output_topology,
|
|
|
|
|
.VertexURBEntryReadLength = gs_prog_data->base.urb_read_length,
|
|
|
|
|
.DispatchGRFStartRegisterForURBData =
|
|
|
|
|
gs_prog_data->base.base.dispatch_grf_start_reg,
|
|
|
|
|
|
|
|
|
|
.MaximumNumberofThreads = device->info.max_gs_threads,
|
|
|
|
|
.ControlDataHeaderSize = gs_prog_data->control_data_header_size_hwords,
|
|
|
|
|
//pipeline->gs_prog_data.dispatch_mode |
|
|
|
|
|
.StatisticsEnable = true,
|
|
|
|
|
.IncludePrimitiveID = gs_prog_data->include_primitive_id,
|
|
|
|
|
.ReorderMode = TRAILING,
|
|
|
|
|
.Enable = true,
|
|
|
|
|
|
|
|
|
|
.ControlDataFormat = gs_prog_data->control_data_format,
|
|
|
|
|
|
|
|
|
|
/* FIXME: mesa sets this based on ctx->Transform.ClipPlanesEnabled:
|
|
|
|
|
* UserClipDistanceClipTestEnableBitmask_3DSTATE_GS(v)
|
|
|
|
|
* UserClipDistanceCullTestEnableBitmask(v)
|
|
|
|
|
*/
|
|
|
|
|
|
|
|
|
|
.VertexURBEntryOutputReadOffset = offset,
|
|
|
|
|
.VertexURBEntryOutputLength = length);
|
|
|
|
|
|
|
|
|
|
const struct brw_vue_prog_data *vue_prog_data = &pipeline->vs_prog_data.base;
|
|
|
|
|
/* Skip the VUE header and position slots */
|
|
|
|
|
offset = 1;
|
|
|
|
|
length = (vue_prog_data->vue_map.num_slots + 1) / 2 - offset;
|
|
|
|
|
|
|
|
|
|
if (pipeline->vs_simd8 == NO_KERNEL || (extra && extra->disable_vs))
|
|
|
|
|
anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_VS,
|
|
|
|
|
.FunctionEnable = false,
|
|
|
|
|
/* Even if VS is disabled, SBE still gets the amount of
|
2015-08-20 22:32:28 -07:00
|
|
|
* vertex data to read from this field. */
|
|
|
|
|
.VertexURBEntryOutputReadOffset = offset,
|
|
|
|
|
.VertexURBEntryOutputLength = length);
|
2015-08-14 09:30:41 -07:00
|
|
|
else
|
|
|
|
|
anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_VS,
|
|
|
|
|
.KernelStartPointer = pipeline->vs_simd8,
|
|
|
|
|
.SingleVertexDispatch = Multiple,
|
|
|
|
|
.VectorMaskEnable = Dmask,
|
|
|
|
|
.SamplerCount = 0,
|
|
|
|
|
.BindingTableEntryCount =
|
|
|
|
|
vue_prog_data->base.binding_table.size_bytes / 4,
|
|
|
|
|
.ThreadDispatchPriority = Normal,
|
|
|
|
|
.FloatingPointMode = IEEE754,
|
|
|
|
|
.IllegalOpcodeExceptionEnable = false,
|
|
|
|
|
.AccessesUAV = false,
|
|
|
|
|
.SoftwareExceptionEnable = false,
|
|
|
|
|
|
|
|
|
|
.ScratchSpaceBasePointer = pipeline->scratch_start[VK_SHADER_STAGE_VERTEX],
|
|
|
|
|
.PerThreadScratchSpace = ffs(vue_prog_data->base.total_scratch / 2048),
|
|
|
|
|
|
|
|
|
|
.DispatchGRFStartRegisterForURBData =
|
|
|
|
|
vue_prog_data->base.dispatch_grf_start_reg,
|
|
|
|
|
.VertexURBEntryReadLength = vue_prog_data->urb_read_length,
|
|
|
|
|
.VertexURBEntryReadOffset = 0,
|
|
|
|
|
|
|
|
|
|
.MaximumNumberofThreads = device->info.max_vs_threads - 1,
|
|
|
|
|
.StatisticsEnable = false,
|
|
|
|
|
.SIMD8DispatchEnable = true,
|
|
|
|
|
.VertexCacheDisable = false,
|
|
|
|
|
.FunctionEnable = true,
|
|
|
|
|
|
|
|
|
|
.VertexURBEntryOutputReadOffset = offset,
|
|
|
|
|
.VertexURBEntryOutputLength = length,
|
|
|
|
|
.UserClipDistanceClipTestEnableBitmask = 0,
|
|
|
|
|
.UserClipDistanceCullTestEnableBitmask = 0);
|
|
|
|
|
|
|
|
|
|
const struct brw_wm_prog_data *wm_prog_data = &pipeline->wm_prog_data;
|
|
|
|
|
uint32_t ksp0, ksp2, grf_start0, grf_start2;
|
|
|
|
|
|
|
|
|
|
ksp2 = 0;
|
|
|
|
|
grf_start2 = 0;
|
|
|
|
|
if (pipeline->ps_simd8 != NO_KERNEL) {
|
|
|
|
|
ksp0 = pipeline->ps_simd8;
|
|
|
|
|
grf_start0 = wm_prog_data->base.dispatch_grf_start_reg;
|
|
|
|
|
if (pipeline->ps_simd16 != NO_KERNEL) {
|
|
|
|
|
ksp2 = pipeline->ps_simd16;
|
|
|
|
|
grf_start2 = wm_prog_data->dispatch_grf_start_reg_16;
|
|
|
|
|
}
|
|
|
|
|
} else if (pipeline->ps_simd16 != NO_KERNEL) {
|
|
|
|
|
ksp0 = pipeline->ps_simd16;
|
|
|
|
|
grf_start0 = wm_prog_data->dispatch_grf_start_reg_16;
|
|
|
|
|
} else {
|
|
|
|
|
unreachable("no ps shader");
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_PS,
|
|
|
|
|
.KernelStartPointer0 = ksp0,
|
|
|
|
|
|
|
|
|
|
.SingleProgramFlow = false,
|
|
|
|
|
.VectorMaskEnable = true,
|
|
|
|
|
.SamplerCount = 1,
|
|
|
|
|
|
|
|
|
|
.ScratchSpaceBasePointer = pipeline->scratch_start[VK_SHADER_STAGE_FRAGMENT],
|
|
|
|
|
.PerThreadScratchSpace = ffs(wm_prog_data->base.total_scratch / 2048),
|
|
|
|
|
|
|
|
|
|
.MaximumNumberofThreadsPerPSD = 64 - 2,
|
|
|
|
|
.PositionXYOffsetSelect = wm_prog_data->uses_pos_offset ?
|
|
|
|
|
POSOFFSET_SAMPLE: POSOFFSET_NONE,
|
|
|
|
|
.PushConstantEnable = wm_prog_data->base.nr_params > 0,
|
|
|
|
|
._8PixelDispatchEnable = pipeline->ps_simd8 != NO_KERNEL,
|
|
|
|
|
._16PixelDispatchEnable = pipeline->ps_simd16 != NO_KERNEL,
|
|
|
|
|
._32PixelDispatchEnable = false,
|
|
|
|
|
|
|
|
|
|
.DispatchGRFStartRegisterForConstantSetupData0 = grf_start0,
|
|
|
|
|
.DispatchGRFStartRegisterForConstantSetupData1 = 0,
|
|
|
|
|
.DispatchGRFStartRegisterForConstantSetupData2 = grf_start2,
|
|
|
|
|
|
|
|
|
|
.KernelStartPointer1 = 0,
|
|
|
|
|
.KernelStartPointer2 = ksp2);
|
|
|
|
|
|
|
|
|
|
bool per_sample_ps = false;
|
|
|
|
|
anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_PS_EXTRA,
|
|
|
|
|
.PixelShaderValid = true,
|
|
|
|
|
.PixelShaderKillsPixel = wm_prog_data->uses_kill,
|
|
|
|
|
.PixelShaderComputedDepthMode = wm_prog_data->computed_depth_mode,
|
|
|
|
|
.AttributeEnable = wm_prog_data->num_varying_inputs > 0,
|
|
|
|
|
.oMaskPresenttoRenderTarget = wm_prog_data->uses_omask,
|
|
|
|
|
.PixelShaderIsPerSample = per_sample_ps);
|
|
|
|
|
|
|
|
|
|
*pPipeline = anv_pipeline_to_handle(pipeline);
|
|
|
|
|
|
|
|
|
|
return VK_SUCCESS;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
VkResult gen8_compute_pipeline_create(
|
|
|
|
|
VkDevice _device,
|
|
|
|
|
const VkComputePipelineCreateInfo* pCreateInfo,
|
|
|
|
|
VkPipeline* pPipeline)
|
|
|
|
|
{
|
|
|
|
|
ANV_FROM_HANDLE(anv_device, device, _device);
|
|
|
|
|
struct anv_pipeline *pipeline;
|
|
|
|
|
VkResult result;
|
|
|
|
|
|
|
|
|
|
assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_COMPUTE_PIPELINE_CREATE_INFO);
|
|
|
|
|
|
|
|
|
|
pipeline = anv_device_alloc(device, sizeof(*pipeline), 8,
|
|
|
|
|
VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
|
|
|
|
|
if (pipeline == NULL)
|
|
|
|
|
return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
|
|
|
|
|
|
|
|
|
|
pipeline->device = device;
|
|
|
|
|
pipeline->layout = anv_pipeline_layout_from_handle(pCreateInfo->layout);
|
|
|
|
|
|
|
|
|
|
result = anv_reloc_list_init(&pipeline->batch_relocs, device);
|
|
|
|
|
if (result != VK_SUCCESS) {
|
|
|
|
|
anv_device_free(device, pipeline);
|
|
|
|
|
return result;
|
|
|
|
|
}
|
|
|
|
|
pipeline->batch.next = pipeline->batch.start = pipeline->batch_data;
|
|
|
|
|
pipeline->batch.end = pipeline->batch.start + sizeof(pipeline->batch_data);
|
|
|
|
|
pipeline->batch.relocs = &pipeline->batch_relocs;
|
|
|
|
|
|
|
|
|
|
anv_state_stream_init(&pipeline->program_stream,
|
|
|
|
|
&device->instruction_block_pool);
|
|
|
|
|
|
|
|
|
|
memset(pipeline->shaders, 0, sizeof(pipeline->shaders));
|
|
|
|
|
|
|
|
|
|
pipeline->shaders[VK_SHADER_STAGE_COMPUTE] =
|
|
|
|
|
anv_shader_from_handle(pCreateInfo->cs.shader);
|
|
|
|
|
|
|
|
|
|
pipeline->use_repclear = false;
|
|
|
|
|
|
|
|
|
|
anv_compiler_run(device->compiler, pipeline);
|
|
|
|
|
|
|
|
|
|
const struct brw_cs_prog_data *cs_prog_data = &pipeline->cs_prog_data;
|
|
|
|
|
|
|
|
|
|
anv_batch_emit(&pipeline->batch, GEN8_MEDIA_VFE_STATE,
|
|
|
|
|
.ScratchSpaceBasePointer = pipeline->scratch_start[VK_SHADER_STAGE_FRAGMENT],
|
|
|
|
|
.PerThreadScratchSpace = ffs(cs_prog_data->base.total_scratch / 2048),
|
|
|
|
|
.ScratchSpaceBasePointerHigh = 0,
|
|
|
|
|
.StackSize = 0,
|
|
|
|
|
|
|
|
|
|
.MaximumNumberofThreads = device->info.max_cs_threads - 1,
|
|
|
|
|
.NumberofURBEntries = 2,
|
|
|
|
|
.ResetGatewayTimer = true,
|
|
|
|
|
.BypassGatewayControl = true,
|
|
|
|
|
.URBEntryAllocationSize = 2,
|
|
|
|
|
.CURBEAllocationSize = 0);
|
|
|
|
|
|
|
|
|
|
struct brw_cs_prog_data *prog_data = &pipeline->cs_prog_data;
|
|
|
|
|
uint32_t group_size = prog_data->local_size[0] *
|
|
|
|
|
prog_data->local_size[1] * prog_data->local_size[2];
|
|
|
|
|
pipeline->cs_thread_width_max = DIV_ROUND_UP(group_size, prog_data->simd_size);
|
|
|
|
|
uint32_t remainder = group_size & (prog_data->simd_size - 1);
|
|
|
|
|
|
|
|
|
|
if (remainder > 0)
|
|
|
|
|
pipeline->cs_right_mask = ~0u >> (32 - remainder);
|
|
|
|
|
else
|
|
|
|
|
pipeline->cs_right_mask = ~0u >> (32 - prog_data->simd_size);
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
*pPipeline = anv_pipeline_to_handle(pipeline);
|
|
|
|
|
|
|
|
|
|
return VK_SUCCESS;
|
|
|
|
|
}
|
