2009-04-08 15:16:35 -04:00
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/*
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Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved.
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The Weather Channel (TM) funded Tungsten Graphics to develop the
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initial release of the Radeon 8500 driver under the XFree86 license.
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This notice must be preserved.
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Permission is hereby granted, free of charge, to any person obtaining
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a copy of this software and associated documentation files (the
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"Software"), to deal in the Software without restriction, including
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without limitation the rights to use, copy, modify, merge, publish,
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distribute, sublicense, and/or sell copies of the Software, and to
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permit persons to whom the Software is furnished to do so, subject to
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the following conditions:
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The above copyright notice and this permission notice (including the
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next paragraph) shall be included in all copies or substantial
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portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
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IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
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LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
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OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
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WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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**************************************************************************/
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/**
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* \file
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*
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* \author Keith Whitwell <keith@tungstengraphics.com>
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*
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* \author Nicolai Haehnle <prefect_@gmx.net>
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*/
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#include "main/glheader.h"
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#include "main/api_arrayelt.h"
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#include "main/context.h"
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#include "main/simple_list.h"
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#include "main/imports.h"
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#include "main/matrix.h"
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#include "main/extensions.h"
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#include "main/state.h"
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#include "main/bufferobj.h"
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#include "main/texobj.h"
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#include "swrast/swrast.h"
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#include "swrast_setup/swrast_setup.h"
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#include "vbo/vbo.h"
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#include "tnl/tnl.h"
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#include "tnl/t_pipeline.h"
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#include "tnl/t_vp_build.h"
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#include "drivers/common/driverfuncs.h"
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#include "r600_context.h"
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#include "radeon_context.h"
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#include "radeon_span.h"
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#include "r600_cmdbuf.h"
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#include "r600_emit.h"
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#include "r600_swtcl.h"
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#include "radeon_bocs_wrapper.h"
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2009-04-21 12:54:20 -04:00
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#include "r700_chip.h"
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#include "r700_state.h"
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#include "r700_ioctl.h"
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2009-04-08 15:16:35 -04:00
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#include "vblank.h"
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#include "utils.h"
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#include "xmlpool.h" /* for symbolic values of enum-type options */
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/* hw_tcl_on derives from future_hw_tcl_on when its safe to change it. */
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int future_hw_tcl_on = 1;
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int hw_tcl_on = 1;
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#define need_GL_VERSION_2_0
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#define need_GL_ARB_point_parameters
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#define need_GL_ARB_vertex_program
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#define need_GL_EXT_blend_equation_separate
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#define need_GL_EXT_blend_func_separate
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#define need_GL_EXT_blend_minmax
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#define need_GL_EXT_framebuffer_object
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#define need_GL_EXT_fog_coord
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#define need_GL_EXT_gpu_program_parameters
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#define need_GL_EXT_secondary_color
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#define need_GL_EXT_stencil_two_side
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#define need_GL_ATI_separate_stencil
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#define need_GL_NV_vertex_program
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#include "extension_helper.h"
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const struct dri_extension card_extensions[] = {
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/* *INDENT-OFF* */
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{"GL_ARB_depth_texture", NULL},
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{"GL_ARB_fragment_program", NULL},
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{"GL_ARB_multitexture", NULL},
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{"GL_ARB_point_parameters", GL_ARB_point_parameters_functions},
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{"GL_ARB_shadow", NULL},
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{"GL_ARB_shadow_ambient", NULL},
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{"GL_ARB_texture_border_clamp", NULL},
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{"GL_ARB_texture_cube_map", NULL},
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{"GL_ARB_texture_env_add", NULL},
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{"GL_ARB_texture_env_combine", NULL},
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{"GL_ARB_texture_env_crossbar", NULL},
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{"GL_ARB_texture_env_dot3", NULL},
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{"GL_ARB_texture_mirrored_repeat", NULL},
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{"GL_ARB_vertex_program", GL_ARB_vertex_program_functions},
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{"GL_EXT_blend_equation_separate", GL_EXT_blend_equation_separate_functions},
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{"GL_EXT_blend_func_separate", GL_EXT_blend_func_separate_functions},
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{"GL_EXT_blend_minmax", GL_EXT_blend_minmax_functions},
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{"GL_EXT_blend_subtract", NULL},
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{"GL_EXT_packed_depth_stencil", NULL},
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{"GL_EXT_fog_coord", GL_EXT_fog_coord_functions },
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{"GL_EXT_gpu_program_parameters", GL_EXT_gpu_program_parameters_functions},
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{"GL_EXT_secondary_color", GL_EXT_secondary_color_functions},
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{"GL_EXT_shadow_funcs", NULL},
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{"GL_EXT_stencil_two_side", GL_EXT_stencil_two_side_functions},
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{"GL_EXT_stencil_wrap", NULL},
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{"GL_EXT_texture_edge_clamp", NULL},
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{"GL_EXT_texture_env_combine", NULL},
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{"GL_EXT_texture_env_dot3", NULL},
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{"GL_EXT_texture_filter_anisotropic", NULL},
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{"GL_EXT_texture_lod_bias", NULL},
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{"GL_EXT_texture_mirror_clamp", NULL},
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{"GL_EXT_texture_rectangle", NULL},
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{"GL_ATI_separate_stencil", GL_ATI_separate_stencil_functions},
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{"GL_ATI_texture_env_combine3", NULL},
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{"GL_ATI_texture_mirror_once", NULL},
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{"GL_MESA_pack_invert", NULL},
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{"GL_MESA_ycbcr_texture", NULL},
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{"GL_MESAX_texture_float", NULL},
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{"GL_NV_blend_square", NULL},
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{"GL_NV_vertex_program", GL_NV_vertex_program_functions},
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{"GL_SGIS_generate_mipmap", NULL},
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{NULL, NULL}
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/* *INDENT-ON* */
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};
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const struct dri_extension mm_extensions[] = {
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{ "GL_EXT_framebuffer_object", GL_EXT_framebuffer_object_functions },
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{ NULL, NULL }
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};
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/**
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* The GL 2.0 functions are needed to make display lists work with
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* functions added by GL_ATI_separate_stencil.
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*/
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const struct dri_extension gl_20_extension[] = {
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{"GL_VERSION_2_0", GL_VERSION_2_0_functions },
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};
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2009-04-09 10:55:41 -04:00
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static void r600RunPipeline(GLcontext * ctx)
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{
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_mesa_lock_context_textures(ctx);
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if (ctx->NewState)
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_mesa_update_state_locked(ctx);
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_tnl_run_pipeline(ctx);
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_mesa_unlock_context_textures(ctx);
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}
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2009-04-09 10:55:41 -04:00
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static void r600_get_lock(radeonContextPtr rmesa)
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{
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drm_radeon_sarea_t *sarea = rmesa->sarea;
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if (sarea->ctx_owner != rmesa->dri.hwContext) {
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sarea->ctx_owner = rmesa->dri.hwContext;
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if (!rmesa->radeonScreen->kernel_mm)
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radeon_bo_legacy_texture_age(rmesa->radeonScreen->bom);
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}
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}
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2009-04-09 10:55:41 -04:00
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static void r600_vtbl_emit_cs_header(struct radeon_cs *cs, radeonContextPtr rmesa)
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{
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/* please flush pipe do all pending work */
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2009-04-21 12:54:20 -04:00
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/* to be enabled */
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2009-04-08 15:16:35 -04:00
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}
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2009-04-09 10:55:41 -04:00
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static void r600_vtbl_pre_emit_atoms(radeonContextPtr radeon)
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{
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/* to be enabled */
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2009-04-08 15:16:35 -04:00
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}
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2009-04-09 10:55:41 -04:00
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static void r600_fallback(GLcontext *ctx, GLuint bit, GLboolean mode)
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{
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r600ContextPtr r600 = R600_CONTEXT(ctx);
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2009-04-08 15:16:35 -04:00
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if (mode)
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2009-04-09 10:55:41 -04:00
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r600->radeon.Fallback |= bit;
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2009-04-08 15:16:35 -04:00
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else
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r600->radeon.Fallback &= ~bit;
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2009-04-08 15:16:35 -04:00
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}
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2009-04-09 10:55:41 -04:00
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static void r600_init_vtbl(radeonContextPtr radeon)
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{
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2009-04-09 10:55:41 -04:00
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radeon->vtbl.get_lock = r600_get_lock;
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2009-04-21 12:54:20 -04:00
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radeon->vtbl.update_viewport_offset = r700UpdateViewportOffset;
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2009-04-09 10:55:41 -04:00
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radeon->vtbl.emit_cs_header = r600_vtbl_emit_cs_header;
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radeon->vtbl.swtcl_flush = r600_swtcl_flush;
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radeon->vtbl.pre_emit_atoms = r600_vtbl_pre_emit_atoms;
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radeon->vtbl.fallback = r600_fallback;
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2009-04-08 15:16:35 -04:00
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}
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2009-04-21 12:54:20 -04:00
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/* to be enabled */
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static GLboolean r600LoadMemSurf(context_t *context,
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GLuint dst_offset, /* gpu addr */
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GLuint dst_pitch_in_pixel,
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GLuint src_width_in_pixel,
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GLuint height,
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GLuint byte_per_pixel,
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unsigned char* pSrc) /* source data */
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{
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return GL_TRUE;
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}
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/* to be enabled */
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static GLboolean r600AllocMemSurf(context_t *context,
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void **ppmemBlock,
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void **ppheap,
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GLuint *prefered_heap, /* Now used RADEON_LOCAL_TEX_HEAP, return actual heap used. */
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GLuint totalSize)
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{
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return GL_TRUE;
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2009-04-21 12:54:20 -04:00
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}
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/* to be enabled */
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static int r600FlushCmdBuffer(context_t *context)
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{
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int ret = 0;
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return ret;
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}
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/* to be enabled */
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static void r600MemUse(context_t *context, int id)
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{
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}
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2009-04-08 15:16:35 -04:00
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/* Create the device specific rendering context.
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*/
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2009-04-09 10:55:41 -04:00
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GLboolean r600CreateContext(const __GLcontextModes * glVisual,
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__DRIcontextPrivate * driContextPriv,
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void *sharedContextPrivate)
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{
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__DRIscreenPrivate *sPriv = driContextPriv->driScreenPriv;
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radeonScreenPtr screen = (radeonScreenPtr) (sPriv->private);
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struct dd_function_table functions;
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2009-04-09 10:55:41 -04:00
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r600ContextPtr r600;
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2009-04-08 15:16:35 -04:00
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GLcontext *ctx;
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int tcl_mode;
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assert(glVisual);
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assert(driContextPriv);
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assert(screen);
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2009-04-09 10:55:41 -04:00
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/* Allocate the R600 context */
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r600 = (r600ContextPtr) CALLOC(sizeof(*r600));
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if (!r600)
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2009-04-08 15:16:35 -04:00
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return GL_FALSE;
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if (!(screen->chip_flags & RADEON_CHIPSET_TCL))
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hw_tcl_on = future_hw_tcl_on = 0;
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2009-04-09 10:55:41 -04:00
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r600_init_vtbl(&r600->radeon);
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2009-04-08 15:16:35 -04:00
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/* Parse configuration files.
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* Do this here so that initialMaxAnisotropy is set before we create
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* the default textures.
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*/
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2009-04-09 10:55:41 -04:00
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driParseConfigFiles(&r600->radeon.optionCache, &screen->optionCache,
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screen->driScreen->myNum, "r600");
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2009-05-08 19:23:45 -04:00
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2009-04-09 10:55:41 -04:00
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r600->radeon.initialMaxAnisotropy = driQueryOptionf(&r600->radeon.optionCache,
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2009-04-08 15:16:35 -04:00
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"def_max_anisotropy");
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2009-04-09 10:55:41 -04:00
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/* Init default driver functions then plug in our R600-specific functions
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2009-04-08 15:16:35 -04:00
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* (the texture functions are especially important)
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*/
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_mesa_init_driver_functions(&functions);
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2009-04-21 12:54:20 -04:00
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r700InitChipObject(r600); /* let the eag... */
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(r600->chipobj.InitFuncs)(&functions);
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r600->chipobj.EmitShader = r600EmitShader;
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2009-05-08 19:23:45 -04:00
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r600->chipobj.DeleteShader = r600DeleteShader;
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2009-04-21 12:54:20 -04:00
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r600->chipobj.LoadMemSurf = r600LoadMemSurf;
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r600->chipobj.AllocMemSurf = r600AllocMemSurf;
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r600->chipobj.MemUse = r600MemUse;
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2009-04-08 15:16:35 -04:00
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2009-04-09 10:55:41 -04:00
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if (!radeonInitContext(&r600->radeon, &functions,
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2009-04-08 15:16:35 -04:00
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glVisual, driContextPriv,
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sharedContextPrivate)) {
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2009-04-09 10:55:41 -04:00
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FREE(r600);
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2009-04-08 15:16:35 -04:00
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return GL_FALSE;
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}
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2009-04-09 10:55:41 -04:00
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/* Init r600 context data */
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2009-04-08 15:16:35 -04:00
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/* Set the maximum texture size small enough that we can guarentee that
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* all texture units can bind a maximal texture and have them both in
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* texturable memory at once.
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*/
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2009-04-09 10:55:41 -04:00
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ctx = r600->radeon.glCtx;
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2009-04-08 15:16:35 -04:00
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ctx->Const.MaxTextureImageUnits =
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2009-04-09 10:55:41 -04:00
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driQueryOptioni(&r600->radeon.optionCache, "texture_image_units");
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2009-04-08 15:16:35 -04:00
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ctx->Const.MaxTextureCoordUnits =
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2009-04-09 10:55:41 -04:00
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driQueryOptioni(&r600->radeon.optionCache, "texture_coord_units");
|
2009-04-08 15:16:35 -04:00
|
|
|
ctx->Const.MaxTextureUnits =
|
|
|
|
MIN2(ctx->Const.MaxTextureImageUnits,
|
|
|
|
ctx->Const.MaxTextureCoordUnits);
|
|
|
|
ctx->Const.MaxTextureMaxAnisotropy = 16.0;
|
|
|
|
ctx->Const.MaxTextureLodBias = 16.0;
|
|
|
|
|
2009-04-21 12:54:20 -04:00
|
|
|
if (screen->chip_family >= CHIP_FAMILY_RV515) {
|
|
|
|
ctx->Const.MaxTextureLevels = 13;
|
|
|
|
ctx->Const.MaxTextureRectSize = 4096;
|
|
|
|
}
|
2009-04-08 15:16:35 -04:00
|
|
|
|
2009-04-21 12:54:20 -04:00
|
|
|
ctx->Const.MinPointSize = 0x0001 / 8.0;
|
|
|
|
ctx->Const.MinPointSizeAA = 0x0001 / 8.0;
|
|
|
|
ctx->Const.MaxPointSize = 0xffff / 8.0;
|
|
|
|
ctx->Const.MaxPointSizeAA = 0xffff / 8.0;
|
2009-04-08 15:16:35 -04:00
|
|
|
|
2009-04-21 12:54:20 -04:00
|
|
|
ctx->Const.MinLineWidth = 0x0001 / 8.0;
|
|
|
|
ctx->Const.MinLineWidthAA = 0x0001 / 8.0;
|
|
|
|
ctx->Const.MaxLineWidth = 0xffff / 8.0;
|
|
|
|
ctx->Const.MaxLineWidthAA = 0xffff / 8.0;
|
2009-04-08 15:16:35 -04:00
|
|
|
|
|
|
|
/* Needs further modifications */
|
|
|
|
#if 0
|
|
|
|
ctx->Const.MaxArrayLockSize =
|
|
|
|
( /*512 */ RADEON_BUFFER_SIZE * 16 * 1024) / (4 * 4);
|
|
|
|
#endif
|
|
|
|
|
|
|
|
ctx->Const.MaxDrawBuffers = 1;
|
|
|
|
|
|
|
|
/* Initialize the software rasterizer and helper modules.
|
|
|
|
*/
|
|
|
|
_swrast_CreateContext(ctx);
|
|
|
|
_vbo_CreateContext(ctx);
|
|
|
|
_tnl_CreateContext(ctx);
|
|
|
|
_swsetup_CreateContext(ctx);
|
|
|
|
_swsetup_Wakeup(ctx);
|
|
|
|
_ae_create_context(ctx);
|
|
|
|
|
|
|
|
/* Install the customized pipeline:
|
|
|
|
*/
|
|
|
|
_tnl_destroy_pipeline(ctx);
|
2009-04-21 12:54:20 -04:00
|
|
|
_tnl_install_pipeline(ctx, (const struct tnl_pipeline_stage **)(r600->chipobj.stages));
|
2009-04-08 15:16:35 -04:00
|
|
|
|
|
|
|
/* Try and keep materials and vertices separate:
|
|
|
|
*/
|
|
|
|
/* _tnl_isolate_materials(ctx, GL_TRUE); */
|
|
|
|
|
|
|
|
/* Configure swrast and TNL to match hardware characteristics:
|
|
|
|
*/
|
|
|
|
_swrast_allow_pixel_fog(ctx, GL_FALSE);
|
|
|
|
_swrast_allow_vertex_fog(ctx, GL_TRUE);
|
|
|
|
_tnl_allow_pixel_fog(ctx, GL_FALSE);
|
|
|
|
_tnl_allow_vertex_fog(ctx, GL_TRUE);
|
|
|
|
|
|
|
|
/* currently bogus data */
|
2009-04-21 12:54:20 -04:00
|
|
|
if (screen->chip_flags & RADEON_CHIPSET_TCL) {
|
|
|
|
ctx->Const.VertexProgram.MaxInstructions = VSF_MAX_FRAGMENT_LENGTH / 4;
|
|
|
|
ctx->Const.VertexProgram.MaxNativeInstructions =
|
|
|
|
VSF_MAX_FRAGMENT_LENGTH / 4;
|
|
|
|
ctx->Const.VertexProgram.MaxNativeAttribs = 16; /* r420 */
|
|
|
|
ctx->Const.VertexProgram.MaxTemps = 32;
|
|
|
|
ctx->Const.VertexProgram.MaxNativeTemps =
|
|
|
|
/*VSF_MAX_FRAGMENT_TEMPS */ 32;
|
|
|
|
ctx->Const.VertexProgram.MaxNativeParameters = 256; /* r420 */
|
|
|
|
ctx->Const.VertexProgram.MaxNativeAddressRegs = 1;
|
|
|
|
}
|
2009-04-08 15:16:35 -04:00
|
|
|
|
|
|
|
ctx->Const.FragmentProgram.MaxNativeTemps = PFS_NUM_TEMP_REGS;
|
|
|
|
ctx->Const.FragmentProgram.MaxNativeAttribs = 11; /* copy i915... */
|
|
|
|
ctx->Const.FragmentProgram.MaxNativeParameters = PFS_NUM_CONST_REGS;
|
|
|
|
ctx->Const.FragmentProgram.MaxNativeAluInstructions = PFS_MAX_ALU_INST;
|
|
|
|
ctx->Const.FragmentProgram.MaxNativeTexInstructions = PFS_MAX_TEX_INST;
|
|
|
|
ctx->Const.FragmentProgram.MaxNativeInstructions =
|
|
|
|
PFS_MAX_ALU_INST + PFS_MAX_TEX_INST;
|
|
|
|
ctx->Const.FragmentProgram.MaxNativeTexIndirections =
|
|
|
|
PFS_MAX_TEX_INDIRECT;
|
|
|
|
ctx->Const.FragmentProgram.MaxNativeAddressRegs = 0; /* and these are?? */
|
|
|
|
ctx->VertexProgram._MaintainTnlProgram = GL_TRUE;
|
|
|
|
ctx->FragmentProgram._MaintainTexEnvProgram = GL_TRUE;
|
|
|
|
|
|
|
|
driInitExtensions(ctx, card_extensions, GL_TRUE);
|
2009-04-09 10:55:41 -04:00
|
|
|
if (r600->radeon.radeonScreen->kernel_mm)
|
2009-04-08 15:16:35 -04:00
|
|
|
driInitExtensions(ctx, mm_extensions, GL_FALSE);
|
|
|
|
|
|
|
|
if (driQueryOptionb
|
2009-04-09 10:55:41 -04:00
|
|
|
(&r600->radeon.optionCache, "disable_stencil_two_side"))
|
2009-04-08 15:16:35 -04:00
|
|
|
_mesa_disable_extension(ctx, "GL_EXT_stencil_two_side");
|
|
|
|
|
2009-04-09 10:55:41 -04:00
|
|
|
if (r600->radeon.glCtx->Mesa_DXTn
|
|
|
|
&& !driQueryOptionb(&r600->radeon.optionCache, "disable_s3tc")) {
|
2009-04-08 15:16:35 -04:00
|
|
|
_mesa_enable_extension(ctx, "GL_EXT_texture_compression_s3tc");
|
|
|
|
_mesa_enable_extension(ctx, "GL_S3_s3tc");
|
|
|
|
} else
|
2009-04-09 10:55:41 -04:00
|
|
|
if (driQueryOptionb(&r600->radeon.optionCache, "force_s3tc_enable"))
|
2009-04-08 15:16:35 -04:00
|
|
|
{
|
|
|
|
_mesa_enable_extension(ctx, "GL_EXT_texture_compression_s3tc");
|
|
|
|
}
|
|
|
|
|
2009-04-09 10:55:41 -04:00
|
|
|
r600->disable_lowimpact_fallback =
|
|
|
|
driQueryOptionb(&r600->radeon.optionCache,
|
2009-04-08 15:16:35 -04:00
|
|
|
"disable_lowimpact_fallback");
|
2009-04-09 10:55:41 -04:00
|
|
|
radeon_fbo_init(&r600->radeon);
|
2009-04-08 15:16:35 -04:00
|
|
|
radeonInitSpanFuncs( ctx );
|
2009-04-21 12:54:20 -04:00
|
|
|
|
2009-04-09 10:55:41 -04:00
|
|
|
r600InitCmdBuf(r600);
|
2009-05-08 19:23:45 -04:00
|
|
|
|
|
|
|
(r600->chipobj.InitState)(r600->radeon.glCtx);
|
2009-04-21 12:54:20 -04:00
|
|
|
#if 0 /* to be enabled */
|
2009-04-08 15:16:35 -04:00
|
|
|
if (!(screen->chip_flags & RADEON_CHIPSET_TCL))
|
2009-04-09 10:55:41 -04:00
|
|
|
r600InitSwtcl(ctx);
|
2009-04-21 12:54:20 -04:00
|
|
|
#endif
|
2009-04-08 15:16:35 -04:00
|
|
|
|
2009-04-09 10:55:41 -04:00
|
|
|
TNL_CONTEXT(ctx)->Driver.RunPipeline = r600RunPipeline;
|
2009-04-08 15:16:35 -04:00
|
|
|
|
2009-04-09 10:55:41 -04:00
|
|
|
tcl_mode = driQueryOptioni(&r600->radeon.optionCache, "tcl_mode");
|
|
|
|
if (driQueryOptionb(&r600->radeon.optionCache, "no_rast")) {
|
2009-04-08 15:16:35 -04:00
|
|
|
fprintf(stderr, "disabling 3D acceleration\n");
|
|
|
|
#if R200_MERGED
|
2009-04-09 10:55:41 -04:00
|
|
|
FALLBACK(&r600->radeon, RADEON_FALLBACK_DISABLE, 1);
|
2009-04-08 15:16:35 -04:00
|
|
|
#endif
|
|
|
|
}
|
|
|
|
if (tcl_mode == DRI_CONF_TCL_SW ||
|
2009-04-09 10:55:41 -04:00
|
|
|
!(r600->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL)) {
|
|
|
|
if (r600->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL) {
|
|
|
|
r600->radeon.radeonScreen->chip_flags &=
|
2009-04-08 15:16:35 -04:00
|
|
|
~RADEON_CHIPSET_TCL;
|
|
|
|
fprintf(stderr, "Disabling HW TCL support\n");
|
|
|
|
}
|
2009-04-09 10:55:41 -04:00
|
|
|
TCL_FALLBACK(r600->radeon.glCtx,
|
2009-04-08 15:16:35 -04:00
|
|
|
RADEON_TCL_FALLBACK_TCL_DISABLE, 1);
|
|
|
|
}
|
|
|
|
|
|
|
|
return GL_TRUE;
|
|
|
|
}
|
|
|
|
|
2009-05-15 19:37:09 -04:00
|
|
|
/* Clean our own things only, radeonDestroyContext will do every thing else. */
|
|
|
|
void
|
|
|
|
r600DestroyContext (__DRIcontextPrivate * driContextPriv)
|
|
|
|
{
|
|
|
|
GET_CURRENT_CONTEXT (ctx);
|
2009-05-26 11:13:44 -04:00
|
|
|
context_t *context = ctx ? R700_CONTEXT(ctx) : NULL;
|
2009-05-15 19:37:09 -04:00
|
|
|
|
2009-05-26 11:13:44 -04:00
|
|
|
if (context)
|
|
|
|
(context->chipobj.DestroyChipObj)(context->chipobj.pvChipObj);
|
2009-05-15 19:37:09 -04:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|