2006-11-01 12:03:11 +00:00
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/**************************************************************************
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*
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* Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the
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* "Software"), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sub license, and/or sell copies of the Software, and to
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* permit persons to whom the Software is furnished to do so, subject to
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* the following conditions:
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*
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* The above copyright notice and this permission notice (including the
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* next paragraph) shall be included in all copies or substantial portions
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* of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
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* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
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* IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
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* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
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* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
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* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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**************************************************************************/
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#ifndef _INTEL_INIT_H_
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#define _INTEL_INIT_H_
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2011-10-07 12:26:50 -07:00
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#include <stdbool.h>
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2006-11-01 12:03:11 +00:00
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#include <sys/time.h>
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#include "dri_util.h"
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2008-09-06 03:09:43 +01:00
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#include "intel_bufmgr.h"
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2008-02-22 00:18:54 +00:00
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#include "i915_drm.h"
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2006-11-01 12:03:11 +00:00
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#include "xmlconfig.h"
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2011-06-01 14:19:29 -07:00
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/**
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* \brief Does X driver support DRI2BufferHiz and DRI2BufferStencil?
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*
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* (Here, "X driver" referes to the DDX driver, xf86-video-intel).
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*
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* The DRI2 protocol does not allow us to query the X driver's version nor
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* query for a list of buffer formats that the driver supports. So, to
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* determine if the X driver supports DRI2BufferHiz and DRI2BufferStencil we
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* must resort to a handshake.
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*
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* If the hardware lacks support for separate stencil (and consequently, lacks
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* support for hiz also), then the X driver's separate stencil and hiz support
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* is irrelevant and the handshake never occurs.
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*
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* Complications
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* -------------
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* The handshake is complicated by a bug in xf86-video-intel 2.15. Even though
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* that version of the X driver did not supppot requests for DRI2BufferHiz or
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* DRI2BufferStencil, if requested one it still allocated and returned one.
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* The returned buffer, however, was incorrectly X tiled.
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*
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* How the handshake works
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* -----------------------
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* Initially, intel_screen.dri2_has_hiz is set to unknown. The first time the
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* user requests a depth and stencil buffer, intelCreateBuffers() creates a
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* framebuffer with separate depth and stencil attachments (with formats
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* x8_z24 and s8).
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*
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* Eventually, intel_update_renderbuffers() makes a DRI2 request for
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intel: Fix stencil buffer to be W tiled
Until now, the stencil buffer was allocated as a Y tiled buffer, because
in several locations the PRM states that it is. However, it is actually
W tiled. From the PRM, 2011 Sandy Bridge, Volume 1, Part 2, Section
4.5.2.1 W-Major Format:
W-Major Tile Format is used for separate stencil.
The GTT is incapable of W fencing, so we allocate the stencil buffer with
I915_TILING_NONE and decode the tile's layout in software.
This fix touches the following portions of code:
- In intel_allocate_renderbuffer_storage(), allocate the stencil
buffer with I915_TILING_NONE.
- In intel_verify_dri2_has_hiz(), verify that the stencil buffer is
not tiled.
- In the stencil buffer's span functions, the tile's layout must be
decoded in software.
This commit mutually depends on the xf86-video-intel commit
dri: Do not tile stencil buffer
Author: Chad Versace <chad@chad-versace.us>
Date: Mon Jul 18 00:38:00 2011 -0700
On Gen6 with separate stencil enabled, fixes the following Piglit tests:
bugs/fdo23670-drawpix_stencil
general/stencil-drawpixels
spec/EXT_framebuffer_object/fbo-stencil-GL_STENCIL_INDEX16-copypixels
spec/EXT_framebuffer_object/fbo-stencil-GL_STENCIL_INDEX16-drawpixels
spec/EXT_framebuffer_object/fbo-stencil-GL_STENCIL_INDEX16-readpixels
spec/EXT_framebuffer_object/fbo-stencil-GL_STENCIL_INDEX1-copypixels
spec/EXT_framebuffer_object/fbo-stencil-GL_STENCIL_INDEX1-drawpixels
spec/EXT_framebuffer_object/fbo-stencil-GL_STENCIL_INDEX1-readpixels
spec/EXT_framebuffer_object/fbo-stencil-GL_STENCIL_INDEX4-copypixels
spec/EXT_framebuffer_object/fbo-stencil-GL_STENCIL_INDEX4-drawpixels
spec/EXT_framebuffer_object/fbo-stencil-GL_STENCIL_INDEX4-readpixels
spec/EXT_framebuffer_object/fbo-stencil-GL_STENCIL_INDEX8-copypixels
spec/EXT_framebuffer_object/fbo-stencil-GL_STENCIL_INDEX8-drawpixels
spec/EXT_framebuffer_object/fbo-stencil-GL_STENCIL_INDEX8-readpixels
spec/EXT_packed_depth_stencil/fbo-stencil-GL_DEPTH24_STENCIL8-copypixels
spec/EXT_packed_depth_stencil/fbo-stencil-GL_DEPTH24_STENCIL8-readpixels
spec/EXT_packed_depth_stencil/readpixels-24_8
Note: This is a candidate for the 7.11 branch.
Signed-off-by: Chad Versace <chad@chad-versace.us>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
2011-07-18 00:37:45 -07:00
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* DRI2BufferStencil and DRI2BufferHiz. If the stencil buffer's tiling is
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* I915_TILING_NONE [1], then we joyfully set intel_screen.dri2_has_hiz to
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* true and continue as if nothing happend.
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*
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* [1] The stencil buffer is actually W tiled. However, we request from the
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* kernel a non-tiled buffer because the GTT is incapable of W fencing.
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2011-06-01 14:19:29 -07:00
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*
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* If the buffers are X tiled, however, the handshake has failed and we must
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* clean up.
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* 1. Angrily set intel_screen.dri2_has_hiz to false.
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* 2. Discard the framebuffer's depth and stencil attachments.
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* 3. Attach a packed depth/stencil buffer to the framebuffer (with format
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* s8_z24).
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* 4. Make a DRI2 request for the new buffer, using attachment type
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* DRI2BufferDepthStencil).
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*
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* Future Considerations
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* ---------------------
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* On a sunny day in the far future, when we are certain that no one has an
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* xf86-video-intel installed without hiz and separate stencil support, then
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* this enumerant and the handshake should die.
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*/
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enum intel_dri2_has_hiz {
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INTEL_DRI2_HAS_HIZ_UNKNOWN,
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INTEL_DRI2_HAS_HIZ_TRUE,
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INTEL_DRI2_HAS_HIZ_FALSE,
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};
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2010-02-11 16:44:21 -05:00
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struct intel_screen
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2006-11-01 12:03:11 +00:00
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{
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int deviceID;
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2011-04-25 09:49:09 -04:00
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int gen;
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2006-11-01 12:03:11 +00:00
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int logTextureGranularity;
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2010-01-01 17:09:12 -05:00
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__DRIscreen *driScrnPriv;
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2008-09-06 03:09:43 +01:00
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2011-10-07 12:26:50 -07:00
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bool no_hw;
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2011-03-01 14:46:50 +00:00
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GLuint relaxed_relocations;
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2008-09-04 22:16:31 +01:00
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2011-05-26 15:24:48 -07:00
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/*
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* The hardware hiz and separate stencil fields are needed in intel_screen,
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* rather than solely in intel_context, because glXCreatePbuffer and
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* glXCreatePixmap are not passed a GLXContext.
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*/
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2011-10-07 12:26:50 -07:00
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bool hw_has_separate_stencil;
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bool hw_must_use_separate_stencil;
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bool hw_has_hiz;
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2011-05-26 15:24:48 -07:00
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enum intel_dri2_has_hiz dri2_has_hiz;
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2011-12-29 23:37:17 -08:00
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bool kernel_has_gen7_sol_reset;
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2012-02-01 18:06:53 -02:00
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bool hw_has_llc;
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2011-10-07 12:26:50 -07:00
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bool no_vbo;
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2008-09-04 22:16:31 +01:00
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dri_bufmgr *bufmgr;
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2010-02-11 17:18:01 -05:00
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struct _mesa_HashTable *named_regions;
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2008-08-24 17:59:10 +10:00
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2006-11-01 12:03:11 +00:00
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/**
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* Configuration cache with default values for all contexts
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*/
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driOptionCache optionCache;
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2010-02-11 16:44:21 -05:00
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};
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2006-11-01 12:03:11 +00:00
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2011-10-07 12:26:50 -07:00
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extern bool intelMapScreenRegions(__DRIscreen * sPriv);
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2006-11-01 12:03:11 +00:00
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2010-01-01 17:09:12 -05:00
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extern void intelDestroyContext(__DRIcontext * driContextPriv);
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2006-11-01 12:03:11 +00:00
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2010-01-01 17:09:12 -05:00
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extern GLboolean intelUnbindContext(__DRIcontext * driContextPriv);
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2006-11-01 12:03:11 +00:00
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extern GLboolean
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2010-01-01 17:09:12 -05:00
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intelMakeCurrent(__DRIcontext * driContextPriv,
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__DRIdrawable * driDrawPriv,
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__DRIdrawable * driReadPriv);
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2006-11-01 12:03:11 +00:00
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#endif
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