2018-01-19 18:57:30 -08:00
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/*
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* Copyright © 2017 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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2018-08-19 00:31:46 -07:00
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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2018-01-19 18:57:30 -08:00
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*
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2018-08-19 00:31:46 -07:00
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* The above copyright notice and this permission notice shall be included
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* in all copies or substantial portions of the Software.
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2018-01-19 18:57:30 -08:00
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*
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2018-08-19 00:31:46 -07:00
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
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* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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2018-01-19 18:57:30 -08:00
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*/
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2018-08-19 00:31:46 -07:00
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2018-01-19 18:57:30 -08:00
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#include <stdio.h>
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#include "pipe/p_defines.h"
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#include "pipe/p_state.h"
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#include "pipe/p_context.h"
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#include "pipe/p_screen.h"
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2018-07-24 14:31:07 -07:00
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#include "util/u_format.h"
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2018-01-19 18:57:30 -08:00
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#include "util/u_inlines.h"
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#include "util/ralloc.h"
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2018-04-21 22:20:32 -07:00
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#include "intel/blorp/blorp.h"
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2018-01-19 18:57:30 -08:00
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#include "iris_context.h"
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#include "iris_resource.h"
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#include "iris_screen.h"
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2018-06-24 15:16:34 -07:00
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void
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iris_blorp_surf_for_resource(struct blorp_surf *surf,
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struct pipe_resource *p_res,
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enum isl_aux_usage aux_usage,
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bool is_render_target)
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2018-04-21 22:20:32 -07:00
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{
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struct iris_resource *res = (void *) p_res;
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*surf = (struct blorp_surf) {
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.surf = &res->surf,
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.addr = (struct blorp_address) {
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.buffer = res->bo,
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.offset = 0, // XXX: ???
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.reloc_flags = is_render_target ? EXEC_OBJECT_WRITE : 0,
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.mocs = I915_MOCS_CACHED, // XXX: BDW MOCS, PTE MOCS
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},
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.aux_usage = aux_usage,
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};
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assert(surf->aux_usage == ISL_AUX_USAGE_NONE);
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}
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2018-07-30 23:49:34 -07:00
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/**
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* The pipe->blit() driver hook.
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*
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* This performs a blit between two surfaces, which copies data but may
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* also perform format conversion, scaling, flipping, and so on.
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*/
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2018-04-21 22:20:32 -07:00
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static void
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iris_blit(struct pipe_context *ctx, const struct pipe_blit_info *info)
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{
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struct iris_context *ice = (void *) ctx;
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2018-10-07 20:31:09 -07:00
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struct iris_screen *screen = (struct iris_screen *)ctx->screen;
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const struct gen_device_info *devinfo = &screen->devinfo;
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2018-04-21 22:20:32 -07:00
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struct blorp_surf src_surf, dst_surf;
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iris_blorp_surf_for_resource(&src_surf, info->src.resource,
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ISL_AUX_USAGE_NONE, false);
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iris_blorp_surf_for_resource(&dst_surf, info->dst.resource,
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ISL_AUX_USAGE_NONE, true);
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2018-04-21 22:20:32 -07:00
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2018-10-07 20:31:09 -07:00
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struct iris_format_info src_fmt =
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iris_format_for_usage(devinfo, info->src.format,
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ISL_SURF_USAGE_TEXTURE_BIT);
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struct iris_format_info dst_fmt =
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iris_format_for_usage(devinfo, info->dst.format,
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ISL_SURF_USAGE_RENDER_TARGET_BIT);
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2018-04-21 22:20:32 -07:00
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int src_x0 = info->src.box.x;
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int src_x1 = info->src.box.x + info->src.box.width;
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int src_y0 = info->src.box.y;
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int src_y1 = info->src.box.y + info->src.box.height;
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int dst_x0 = info->dst.box.x;
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int dst_x1 = info->dst.box.x + info->dst.box.width;
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int dst_y0 = info->dst.box.y;
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int dst_y1 = info->dst.box.y + info->dst.box.height;
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bool mirror_x = false;
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bool mirror_y = false;
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enum blorp_filter filter;
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2018-07-24 14:52:50 -07:00
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if (abs(info->dst.box.width) == abs(info->src.box.width) &&
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abs(info->dst.box.height) == abs(info->src.box.height)) {
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2018-07-24 14:31:07 -07:00
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if (src_surf.surf->samples > 1 && dst_surf.surf->samples <= 1) {
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/* The OpenGL ES 3.2 specification, section 16.2.1, says:
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*
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* "If the read framebuffer is multisampled (its effective
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* value of SAMPLE_BUFFERS is one) and the draw framebuffer
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* is not (its value of SAMPLE_BUFFERS is zero), the samples
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* corresponding to each pixel location in the source are
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* converted to a single sample before being written to the
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* destination. The filter parameter is ignored. If the
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* source formats are integer types or stencil values, a
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* single sample’s value is selected for each pixel. If the
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* source formats are floating-point or normalized types,
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* the sample values for each pixel are resolved in an
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* implementation-dependent manner. If the source formats
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* are depth values, sample values are resolved in an
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* implementation-dependent manner where the result will be
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* between the minimum and maximum depth values in the pixel."
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*
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* When selecting a single sample, we always choose sample 0.
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*/
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if (util_format_is_depth_or_stencil(info->src.format) ||
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util_format_is_pure_integer(info->src.format)) {
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filter = BLORP_FILTER_SAMPLE_0;
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} else {
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filter = BLORP_FILTER_AVERAGE;
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}
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} else {
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/* The OpenGL 4.6 specification, section 18.3.1, says:
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*
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* "If the source and destination dimensions are identical,
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* no filtering is applied."
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*
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* Using BLORP_FILTER_NONE will also handle the upsample case by
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* replicating the one value in the source to all values in the
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* destination.
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*/
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filter = BLORP_FILTER_NONE;
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}
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} else if (info->filter == PIPE_TEX_FILTER_LINEAR) {
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filter = BLORP_FILTER_BILINEAR;
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} else {
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filter = BLORP_FILTER_NEAREST;
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}
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2018-04-21 22:20:32 -07:00
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2018-06-26 07:31:56 -07:00
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struct iris_batch *batch = &ice->render_batch;
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2018-04-21 22:20:32 -07:00
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struct blorp_batch blorp_batch;
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blorp_batch_init(&ice->blorp, &blorp_batch, batch, 0);
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2018-08-14 23:20:21 -07:00
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for (int slice = 0; slice < info->dst.box.depth; slice++) {
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2018-08-14 23:37:53 -07:00
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iris_batch_maybe_flush(batch, 1500);
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2018-08-14 23:20:21 -07:00
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blorp_blit(&blorp_batch,
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&src_surf, info->src.level, info->src.box.z + slice,
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2018-10-07 20:31:09 -07:00
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src_fmt.fmt, src_fmt.swizzle,
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2018-08-14 23:20:21 -07:00
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&dst_surf, info->dst.level, info->dst.box.z + slice,
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dst_fmt.fmt, ISL_SWIZZLE_IDENTITY,
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2018-08-14 23:20:21 -07:00
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src_x0, src_y0, src_x1, src_y1,
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dst_x0, dst_y0, dst_x1, dst_y1,
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filter, mirror_x, mirror_y);
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}
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2018-04-21 22:20:32 -07:00
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2018-08-09 12:27:58 -07:00
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if (util_format_is_depth_and_stencil(info->dst.format) &&
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util_format_has_stencil(util_format_description(info->src.format))) {
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struct iris_resource *src_res, *dst_res, *junk;
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iris_get_depth_stencil_resources(info->src.resource, &junk, &src_res);
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iris_get_depth_stencil_resources(info->dst.resource, &junk, &dst_res);
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iris_blorp_surf_for_resource(&src_surf, &src_res->base,
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ISL_AUX_USAGE_NONE, false);
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iris_blorp_surf_for_resource(&dst_surf, &dst_res->base,
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ISL_AUX_USAGE_NONE, true);
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2018-08-14 23:20:21 -07:00
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for (int slice = 0; slice < info->dst.box.depth; slice++) {
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2018-08-14 23:37:53 -07:00
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iris_batch_maybe_flush(batch, 1500);
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2018-08-14 23:20:21 -07:00
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blorp_blit(&blorp_batch,
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&src_surf, info->src.level, info->src.box.z + slice,
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2018-10-07 20:31:09 -07:00
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ISL_FORMAT_R8_UINT, ISL_SWIZZLE_IDENTITY,
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2018-08-14 23:20:21 -07:00
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&dst_surf, info->dst.level, info->dst.box.z + slice,
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ISL_FORMAT_R8_UINT, ISL_SWIZZLE_IDENTITY,
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src_x0, src_y0, src_x1, src_y1,
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dst_x0, dst_y0, dst_x1, dst_y1,
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filter, mirror_x, mirror_y);
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}
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2018-08-09 12:27:58 -07:00
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}
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2018-04-21 22:20:32 -07:00
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blorp_batch_finish(&blorp_batch);
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}
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2018-01-19 18:57:30 -08:00
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2018-07-30 23:49:34 -07:00
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/**
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* The pipe->resource_copy_region() driver hook.
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*
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* This implements ARB_copy_image semantics - a raw memory copy between
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* compatible view classes.
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*/
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2018-06-26 00:28:52 -07:00
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static void
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iris_resource_copy_region(struct pipe_context *ctx,
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struct pipe_resource *dst,
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unsigned dst_level,
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unsigned dstx, unsigned dsty, unsigned dstz,
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struct pipe_resource *src,
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unsigned src_level,
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const struct pipe_box *src_box)
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{
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struct iris_context *ice = (void *) ctx;
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struct blorp_surf src_surf, dst_surf;
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iris_blorp_surf_for_resource(&src_surf, src, ISL_AUX_USAGE_NONE, false);
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iris_blorp_surf_for_resource(&dst_surf, dst, ISL_AUX_USAGE_NONE, true);
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// XXX: ???
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unsigned dst_layer = dstz;
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unsigned src_layer = src_box->z;
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2018-08-14 23:22:12 -07:00
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assert(src_box->depth == 1);
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2018-06-26 07:31:56 -07:00
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struct iris_batch *batch = &ice->render_batch;
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iris_batch_maybe_flush(batch, 1500);
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2018-06-26 00:28:52 -07:00
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struct blorp_batch blorp_batch;
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2018-06-26 07:31:56 -07:00
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blorp_batch_init(&ice->blorp, &blorp_batch, batch, 0);
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2018-06-26 00:28:52 -07:00
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blorp_copy(&blorp_batch, &src_surf, src_level, src_layer,
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&dst_surf, dst_level, dst_layer,
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src_box->x, src_box->y, dstx, dsty,
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src_box->width, src_box->height);
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blorp_batch_finish(&blorp_batch);
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}
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2018-01-19 18:57:30 -08:00
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void
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iris_init_blit_functions(struct pipe_context *ctx)
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{
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ctx->blit = iris_blit;
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2018-06-26 00:28:52 -07:00
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ctx->resource_copy_region = iris_resource_copy_region;
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2018-01-19 18:57:30 -08:00
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}
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