2017-02-03 10:05:00 +10:00
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/*
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* Copyright 2016 Bas Nieuwenhuizen
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the
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* "Software"), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sub license, and/or sell copies of the Software, and to
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* permit persons to whom the Software is furnished to do so, subject to
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* the following conditions:
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
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* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
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* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
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* USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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* The above copyright notice and this permission notice (including the
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* next paragraph) shall be included in all copies or substantial portions
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* of the Software.
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*
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*/
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#ifndef AC_LLVM_BUILD_H
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#define AC_LLVM_BUILD_H
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#include <stdbool.h>
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ac,ac/nir: use a better sync scope for shared atomics
https://reviews.llvm.org/rL356946 (present in LLVM 9 and later) changed
the meaning of the "system" sync scope, making it no longer restricted to
the memory operation's address space. So a single address space sync scope
is needed for shared atomic operations (such as "system-one-as" or
"workgroup-one-as") otherwise buffer_wbinvl1 and s_waitcnt instructions
can be created at each shared atomic operation.
This mostly reimplements LLVMBuildAtomicRMW and LLVMBuildAtomicCmpXchg
to allow for more sync scopes and uses the new functions in ac->nir with
the "workgroup-one-as" or "workgroup" sync scopes.
F1 2017 (4K, Ultra High settings, TAA), avg FPS : 59 -> 59.67 (+1.14%)
Strange Brigade (4K, ~highest settings), avg FPS : 51.5 -> 51.6 (+0.19%)
RotTR/mountain (4K, VeryHigh settings, FXAA), avg FPS : 57.2 -> 57.2 (+0.0%)
RotTR/tomb (4K, VeryHigh settings, FXAA), avg FPS : 42.5 -> 43.0 (+1.17%)
RotTR/valley (4K, VeryHigh settings, FXAA), avg FPS : 40.7 -> 41.6 (+2.21%)
Warhammer II/fallen, avg FPS : 31.63 -> 31.83 (+0.63%)
Warhammer II/skaven, avg FPS : 37.77 -> 38.07 (+0.79%)
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2019-04-25 14:44:40 +01:00
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#include <llvm-c/Core.h>
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2018-03-06 15:03:36 +01:00
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#include "compiler/nir/nir.h"
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2017-09-13 14:36:23 +02:00
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#include "amd_family.h"
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2017-02-03 10:05:00 +10:00
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#ifdef __cplusplus
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extern "C" {
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#endif
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2017-10-26 14:43:51 +10:00
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enum {
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2018-11-02 09:50:32 +01:00
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AC_ADDR_SPACE_FLAT = 0, /* Slower than global. */
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2018-09-07 18:44:54 -04:00
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AC_ADDR_SPACE_GLOBAL = 1,
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2018-11-02 09:50:32 +01:00
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AC_ADDR_SPACE_GDS = 2,
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2018-09-07 18:44:54 -04:00
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AC_ADDR_SPACE_LDS = 3,
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2018-11-02 09:50:32 +01:00
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AC_ADDR_SPACE_CONST = 4, /* Global allowing SMEM. */
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2018-09-07 18:44:54 -04:00
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AC_ADDR_SPACE_CONST_32BIT = 6, /* same as CONST, but the pointer type has 32 bits */
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2017-10-26 14:43:51 +10:00
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};
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2019-06-24 16:13:24 -04:00
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#define AC_WAIT_LGKM (1 << 0) /* LDS, GDS, constant, message */
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2019-06-29 00:59:55 -04:00
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#define AC_WAIT_VLOAD (1 << 1) /* VMEM load/sample instructions */
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#define AC_WAIT_VSTORE (1 << 2) /* VMEM store instructions */
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2018-08-15 21:43:32 -04:00
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2018-03-07 10:53:34 +11:00
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struct ac_llvm_flow;
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2019-07-12 17:32:18 -04:00
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struct ac_llvm_compiler;
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2019-07-12 17:35:39 -04:00
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enum ac_float_mode;
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2018-03-07 10:53:34 +11:00
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2019-07-24 17:19:38 -04:00
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struct ac_llvm_flow_state {
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struct ac_llvm_flow *stack;
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unsigned depth_max;
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unsigned depth;
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};
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2017-02-03 10:05:00 +10:00
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struct ac_llvm_context {
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LLVMContextRef context;
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LLVMModuleRef module;
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LLVMBuilderRef builder;
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LLVMTypeRef voidt;
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LLVMTypeRef i1;
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LLVMTypeRef i8;
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2017-03-30 14:10:26 +02:00
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LLVMTypeRef i16;
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2017-02-03 10:05:00 +10:00
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LLVMTypeRef i32;
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2017-03-30 14:10:26 +02:00
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LLVMTypeRef i64;
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2018-01-01 21:04:22 +01:00
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LLVMTypeRef intptr;
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2017-03-30 14:10:26 +02:00
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LLVMTypeRef f16;
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2017-02-03 10:05:00 +10:00
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LLVMTypeRef f32;
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2017-03-30 14:10:26 +02:00
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LLVMTypeRef f64;
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2018-01-02 04:34:53 +01:00
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LLVMTypeRef v2i16;
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2017-11-02 12:59:00 +11:00
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LLVMTypeRef v2i32;
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2017-11-02 13:02:54 +11:00
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LLVMTypeRef v3i32;
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2017-02-03 10:05:00 +10:00
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LLVMTypeRef v4i32;
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2017-11-02 13:24:27 +11:00
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LLVMTypeRef v2f32;
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2019-05-02 16:15:03 +02:00
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LLVMTypeRef v3f32;
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2017-02-03 10:05:00 +10:00
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LLVMTypeRef v4f32;
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2017-06-08 20:04:28 +02:00
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LLVMTypeRef v8i32;
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2019-07-16 00:55:46 -04:00
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LLVMTypeRef iN_wavemask;
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2019-08-12 20:37:11 -04:00
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LLVMTypeRef iN_ballotmask;
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2017-02-03 10:05:00 +10:00
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2019-03-13 15:53:51 +01:00
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LLVMValueRef i8_0;
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LLVMValueRef i8_1;
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2018-09-14 12:52:34 +02:00
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LLVMValueRef i16_0;
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LLVMValueRef i16_1;
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2017-05-18 22:02:48 +02:00
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LLVMValueRef i32_0;
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LLVMValueRef i32_1;
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2018-01-14 10:06:36 +11:00
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LLVMValueRef i64_0;
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LLVMValueRef i64_1;
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2019-03-21 10:14:29 +01:00
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LLVMValueRef f16_0;
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LLVMValueRef f16_1;
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2017-05-18 22:02:48 +02:00
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LLVMValueRef f32_0;
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LLVMValueRef f32_1;
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2018-01-11 22:09:35 +11:00
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LLVMValueRef f64_0;
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2018-01-11 17:03:36 +11:00
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LLVMValueRef f64_1;
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2017-10-26 15:20:15 +10:00
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LLVMValueRef i1true;
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LLVMValueRef i1false;
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2017-05-18 22:02:48 +02:00
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2019-07-24 17:19:38 -04:00
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/* Since ac_nir_translate makes a local copy of ac_llvm_context, there
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* are two ac_llvm_contexts. Declare a pointer here, so that the control
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* flow stack is shared by both ac_llvm_contexts.
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*/
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struct ac_llvm_flow_state *flow;
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2018-03-07 10:53:34 +11:00
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2017-02-03 10:05:00 +10:00
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unsigned range_md_kind;
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unsigned invariant_load_md_kind;
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unsigned uniform_md_kind;
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unsigned fpmath_md_kind;
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LLVMValueRef fpmath_md_2p5_ulp;
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LLVMValueRef empty_md;
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2017-09-13 14:36:23 +02:00
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enum chip_class chip_class;
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2017-12-21 17:53:14 +01:00
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enum radeon_family family;
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2019-08-12 20:37:11 -04:00
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2019-07-12 17:12:17 -04:00
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unsigned wave_size;
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2019-08-12 20:37:11 -04:00
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unsigned ballot_mask_bits;
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2017-10-26 14:43:51 +10:00
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LLVMValueRef lds;
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2017-02-03 10:05:00 +10:00
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};
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void
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2018-07-04 01:37:30 -04:00
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ac_llvm_context_init(struct ac_llvm_context *ctx,
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2019-07-12 17:32:18 -04:00
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struct ac_llvm_compiler *compiler,
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2019-07-12 17:12:17 -04:00
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enum chip_class chip_class, enum radeon_family family,
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2019-08-12 20:37:11 -04:00
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enum ac_float_mode float_mode, unsigned wave_size,
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unsigned ballot_mask_bits);
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2017-06-05 14:37:01 -07:00
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2018-03-07 10:53:34 +11:00
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void
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ac_llvm_context_dispose(struct ac_llvm_context *ctx);
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2017-12-11 12:54:47 +11:00
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int
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ac_get_llvm_num_components(LLVMValueRef value);
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2018-02-06 14:38:19 +11:00
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int
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ac_get_elem_bits(struct ac_llvm_context *ctx, LLVMTypeRef type);
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2017-12-11 12:54:47 +11:00
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LLVMValueRef
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ac_llvm_extract_elem(struct ac_llvm_context *ac,
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LLVMValueRef value,
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int index);
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2017-06-05 14:37:01 -07:00
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unsigned ac_get_type_size(LLVMTypeRef type);
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2017-02-03 10:05:00 +10:00
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2017-07-18 17:32:10 -07:00
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LLVMTypeRef ac_to_integer_type(struct ac_llvm_context *ctx, LLVMTypeRef t);
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LLVMValueRef ac_to_integer(struct ac_llvm_context *ctx, LLVMValueRef v);
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2018-11-19 13:00:36 +10:00
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LLVMValueRef ac_to_integer_or_pointer(struct ac_llvm_context *ctx, LLVMValueRef v);
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2017-07-18 17:32:10 -07:00
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LLVMTypeRef ac_to_float_type(struct ac_llvm_context *ctx, LLVMTypeRef t);
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LLVMValueRef ac_to_float(struct ac_llvm_context *ctx, LLVMValueRef v);
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2017-02-03 10:05:00 +10:00
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LLVMValueRef
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2017-02-26 00:41:37 +01:00
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ac_build_intrinsic(struct ac_llvm_context *ctx, const char *name,
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LLVMTypeRef return_type, LLVMValueRef *params,
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unsigned param_count, unsigned attrib_mask);
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2017-02-03 10:05:00 +10:00
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2017-02-23 22:58:49 +01:00
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void ac_build_type_name_for_intr(LLVMTypeRef type, char *buf, unsigned bufsize);
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2017-09-29 11:17:03 +02:00
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LLVMValueRef
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ac_build_phi(struct ac_llvm_context *ctx, LLVMTypeRef type,
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unsigned count_incoming, LLVMValueRef *values,
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LLVMBasicBlockRef *blocks);
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2018-08-13 23:59:28 -04:00
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void ac_build_s_barrier(struct ac_llvm_context *ctx);
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2017-06-05 14:16:43 -07:00
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void ac_build_optimization_barrier(struct ac_llvm_context *ctx,
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LLVMValueRef *pvgpr);
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2017-06-05 15:20:04 -07:00
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2018-02-02 13:54:48 +11:00
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LLVMValueRef ac_build_shader_clock(struct ac_llvm_context *ctx);
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2017-06-05 15:20:04 -07:00
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LLVMValueRef ac_build_ballot(struct ac_llvm_context *ctx, LLVMValueRef value);
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2019-02-12 15:00:53 -05:00
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LLVMValueRef ac_get_i1_sgpr_mask(struct ac_llvm_context *ctx,
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LLVMValueRef value);
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2017-06-05 15:20:04 -07:00
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2017-06-06 16:40:26 -07:00
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LLVMValueRef ac_build_vote_all(struct ac_llvm_context *ctx, LLVMValueRef value);
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LLVMValueRef ac_build_vote_any(struct ac_llvm_context *ctx, LLVMValueRef value);
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LLVMValueRef ac_build_vote_eq(struct ac_llvm_context *ctx, LLVMValueRef value);
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2017-11-10 13:55:48 +11:00
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LLVMValueRef
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ac_build_varying_gather_values(struct ac_llvm_context *ctx, LLVMValueRef *values,
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unsigned value_count, unsigned component);
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2017-02-03 10:05:00 +10:00
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LLVMValueRef
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ac_build_gather_values_extended(struct ac_llvm_context *ctx,
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LLVMValueRef *values,
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unsigned value_count,
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unsigned value_stride,
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2017-06-25 13:04:51 +02:00
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bool load,
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bool always_vector);
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2017-02-03 10:05:00 +10:00
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LLVMValueRef
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ac_build_gather_values(struct ac_llvm_context *ctx,
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LLVMValueRef *values,
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unsigned value_count);
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2019-08-16 12:46:27 +02:00
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LLVMValueRef
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ac_extract_components(struct ac_llvm_context *ctx,
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LLVMValueRef value,
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unsigned start,
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unsigned channels);
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radeonsi: load the right number of components for VS inputs and TBOs
The supported counts are 1, 2, 4. (3=4)
The following snippet loads float, vec2, vec3, and vec4:
Before:
buffer_load_format_x v9, v4, s[0:3], 0 idxen ; E0002000 80000904
buffer_load_format_xyzw v[0:3], v5, s[8:11], 0 idxen ; E00C2000 80020005
s_waitcnt vmcnt(0) ; BF8C0F70
buffer_load_format_xyzw v[2:5], v6, s[12:15], 0 idxen ; E00C2000 80030206
s_waitcnt vmcnt(0) ; BF8C0F70
buffer_load_format_xyzw v[5:8], v7, s[4:7], 0 idxen ; E00C2000 80010507
After:
buffer_load_format_x v10, v4, s[0:3], 0 idxen ; E0002000 80000A04
buffer_load_format_xy v[8:9], v5, s[8:11], 0 idxen ; E0042000 80020805
buffer_load_format_xyzw v[0:3], v6, s[12:15], 0 idxen ; E00C2000 80030006
s_waitcnt vmcnt(0) ; BF8C0F70
buffer_load_format_xyzw v[3:6], v7, s[4:7], 0 idxen ; E00C2000 80010307
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2018-01-30 18:34:25 +01:00
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LLVMValueRef ac_build_expand_to_vec4(struct ac_llvm_context *ctx,
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LLVMValueRef value,
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unsigned num_channels);
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2018-09-21 21:30:09 -04:00
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LLVMValueRef ac_build_round(struct ac_llvm_context *ctx, LLVMValueRef value);
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2017-02-03 10:05:00 +10:00
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LLVMValueRef
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2017-02-26 00:41:37 +01:00
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ac_build_fdiv(struct ac_llvm_context *ctx,
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LLVMValueRef num,
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LLVMValueRef den);
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2017-02-03 10:05:00 +10:00
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2018-09-22 21:17:52 -04:00
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LLVMValueRef ac_build_fast_udiv(struct ac_llvm_context *ctx,
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LLVMValueRef num,
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LLVMValueRef multiplier,
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LLVMValueRef pre_shift,
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LLVMValueRef post_shift,
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LLVMValueRef increment);
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LLVMValueRef ac_build_fast_udiv_nuw(struct ac_llvm_context *ctx,
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LLVMValueRef num,
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LLVMValueRef multiplier,
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LLVMValueRef pre_shift,
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LLVMValueRef post_shift,
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LLVMValueRef increment);
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LLVMValueRef ac_build_fast_udiv_u31_d_not_one(struct ac_llvm_context *ctx,
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LLVMValueRef num,
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LLVMValueRef multiplier,
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LLVMValueRef post_shift);
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2017-02-03 10:05:00 +10:00
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void
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ac_prepare_cube_coords(struct ac_llvm_context *ctx,
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2017-09-13 10:47:02 +02:00
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bool is_deriv, bool is_array, bool is_lod,
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2017-02-03 10:05:00 +10:00
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LLVMValueRef *coords_arg,
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LLVMValueRef *derivs_arg);
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LLVMValueRef
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ac_build_fs_interp(struct ac_llvm_context *ctx,
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LLVMValueRef llvm_chan,
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LLVMValueRef attr_number,
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LLVMValueRef params,
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LLVMValueRef i,
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LLVMValueRef j);
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2019-02-22 14:16:08 +01:00
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LLVMValueRef
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ac_build_fs_interp_f16(struct ac_llvm_context *ctx,
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LLVMValueRef llvm_chan,
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LLVMValueRef attr_number,
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|
|
LLVMValueRef params,
|
|
|
|
LLVMValueRef i,
|
|
|
|
LLVMValueRef j);
|
|
|
|
|
2017-02-03 10:05:00 +10:00
|
|
|
LLVMValueRef
|
|
|
|
ac_build_fs_interp_mov(struct ac_llvm_context *ctx,
|
|
|
|
LLVMValueRef parameter,
|
|
|
|
LLVMValueRef llvm_chan,
|
|
|
|
LLVMValueRef attr_number,
|
|
|
|
LLVMValueRef params);
|
|
|
|
|
2019-01-23 01:53:59 +01:00
|
|
|
LLVMValueRef
|
|
|
|
ac_build_gep_ptr(struct ac_llvm_context *ctx,
|
|
|
|
LLVMValueRef base_ptr,
|
|
|
|
LLVMValueRef index);
|
|
|
|
|
2017-02-03 10:05:00 +10:00
|
|
|
LLVMValueRef
|
|
|
|
ac_build_gep0(struct ac_llvm_context *ctx,
|
|
|
|
LLVMValueRef base_ptr,
|
|
|
|
LLVMValueRef index);
|
2018-08-29 01:34:46 -04:00
|
|
|
LLVMValueRef ac_build_pointer_add(struct ac_llvm_context *ctx, LLVMValueRef ptr,
|
|
|
|
LLVMValueRef index);
|
2017-02-03 10:05:00 +10:00
|
|
|
|
|
|
|
void
|
|
|
|
ac_build_indexed_store(struct ac_llvm_context *ctx,
|
|
|
|
LLVMValueRef base_ptr, LLVMValueRef index,
|
|
|
|
LLVMValueRef value);
|
|
|
|
|
2017-10-08 20:05:44 +02:00
|
|
|
LLVMValueRef ac_build_load(struct ac_llvm_context *ctx, LLVMValueRef base_ptr,
|
|
|
|
LLVMValueRef index);
|
|
|
|
LLVMValueRef ac_build_load_invariant(struct ac_llvm_context *ctx,
|
|
|
|
LLVMValueRef base_ptr, LLVMValueRef index);
|
|
|
|
LLVMValueRef ac_build_load_to_sgpr(struct ac_llvm_context *ctx,
|
|
|
|
LLVMValueRef base_ptr, LLVMValueRef index);
|
2018-08-29 01:34:46 -04:00
|
|
|
LLVMValueRef ac_build_load_to_sgpr_uint_wraparound(struct ac_llvm_context *ctx,
|
|
|
|
LLVMValueRef base_ptr, LLVMValueRef index);
|
2017-02-03 10:05:00 +10:00
|
|
|
|
|
|
|
void
|
2017-02-24 01:20:35 +01:00
|
|
|
ac_build_buffer_store_dword(struct ac_llvm_context *ctx,
|
|
|
|
LLVMValueRef rsrc,
|
|
|
|
LLVMValueRef vdata,
|
|
|
|
unsigned num_channels,
|
2017-02-24 20:23:23 +01:00
|
|
|
LLVMValueRef voffset,
|
2017-02-24 01:20:35 +01:00
|
|
|
LLVMValueRef soffset,
|
|
|
|
unsigned inst_offset,
|
2019-06-28 20:53:15 -04:00
|
|
|
unsigned cache_policy,
|
2017-09-30 15:36:18 +02:00
|
|
|
bool swizzle_enable_hint);
|
2019-03-12 12:13:37 +01:00
|
|
|
|
|
|
|
void
|
|
|
|
ac_build_buffer_store_format(struct ac_llvm_context *ctx,
|
|
|
|
LLVMValueRef rsrc,
|
|
|
|
LLVMValueRef data,
|
|
|
|
LLVMValueRef vindex,
|
|
|
|
LLVMValueRef voffset,
|
|
|
|
unsigned num_channels,
|
2019-06-28 20:53:15 -04:00
|
|
|
unsigned cache_policy);
|
2019-03-12 12:13:37 +01:00
|
|
|
|
2017-02-03 10:05:00 +10:00
|
|
|
LLVMValueRef
|
|
|
|
ac_build_buffer_load(struct ac_llvm_context *ctx,
|
|
|
|
LLVMValueRef rsrc,
|
|
|
|
int num_channels,
|
|
|
|
LLVMValueRef vindex,
|
|
|
|
LLVMValueRef voffset,
|
|
|
|
LLVMValueRef soffset,
|
|
|
|
unsigned inst_offset,
|
2019-06-28 20:53:15 -04:00
|
|
|
unsigned cache_policy,
|
2017-05-19 15:02:34 +02:00
|
|
|
bool can_speculate,
|
|
|
|
bool allow_smem);
|
2017-02-03 10:05:00 +10:00
|
|
|
|
2017-02-25 23:40:52 +01:00
|
|
|
LLVMValueRef ac_build_buffer_load_format(struct ac_llvm_context *ctx,
|
|
|
|
LLVMValueRef rsrc,
|
|
|
|
LLVMValueRef vindex,
|
|
|
|
LLVMValueRef voffset,
|
2018-01-10 20:12:10 +01:00
|
|
|
unsigned num_channels,
|
2019-06-28 20:53:15 -04:00
|
|
|
unsigned cache_policy,
|
2017-05-25 16:13:54 +02:00
|
|
|
bool can_speculate);
|
2017-02-25 23:40:52 +01:00
|
|
|
|
2018-02-07 19:40:43 +01:00
|
|
|
LLVMValueRef
|
|
|
|
ac_build_tbuffer_load_short(struct ac_llvm_context *ctx,
|
|
|
|
LLVMValueRef rsrc,
|
|
|
|
LLVMValueRef voffset,
|
2019-02-26 13:42:26 +01:00
|
|
|
LLVMValueRef soffset,
|
|
|
|
LLVMValueRef immoffset,
|
2019-06-28 20:53:15 -04:00
|
|
|
unsigned cache_policy);
|
2018-02-07 19:40:43 +01:00
|
|
|
|
2019-03-13 15:55:42 +01:00
|
|
|
LLVMValueRef
|
|
|
|
ac_build_tbuffer_load_byte(struct ac_llvm_context *ctx,
|
|
|
|
LLVMValueRef rsrc,
|
|
|
|
LLVMValueRef voffset,
|
|
|
|
LLVMValueRef soffset,
|
|
|
|
LLVMValueRef immoffset,
|
2019-06-28 20:53:15 -04:00
|
|
|
unsigned cache_policy);
|
2019-03-13 15:55:42 +01:00
|
|
|
|
2019-02-14 14:42:29 +01:00
|
|
|
LLVMValueRef
|
2019-03-13 14:04:13 +01:00
|
|
|
ac_build_struct_tbuffer_load(struct ac_llvm_context *ctx,
|
|
|
|
LLVMValueRef rsrc,
|
|
|
|
LLVMValueRef vindex,
|
|
|
|
LLVMValueRef voffset,
|
|
|
|
LLVMValueRef soffset,
|
|
|
|
LLVMValueRef immoffset,
|
|
|
|
unsigned num_channels,
|
|
|
|
unsigned dfmt,
|
|
|
|
unsigned nfmt,
|
2019-06-28 20:53:15 -04:00
|
|
|
unsigned cache_policy,
|
2019-03-13 14:04:13 +01:00
|
|
|
bool can_speculate);
|
|
|
|
|
|
|
|
LLVMValueRef
|
|
|
|
ac_build_raw_tbuffer_load(struct ac_llvm_context *ctx,
|
|
|
|
LLVMValueRef rsrc,
|
|
|
|
LLVMValueRef voffset,
|
|
|
|
LLVMValueRef soffset,
|
|
|
|
LLVMValueRef immoffset,
|
|
|
|
unsigned num_channels,
|
|
|
|
unsigned dfmt,
|
|
|
|
unsigned nfmt,
|
2019-06-28 20:53:15 -04:00
|
|
|
unsigned cache_policy,
|
2019-03-13 14:04:13 +01:00
|
|
|
bool can_speculate);
|
2019-02-14 14:42:29 +01:00
|
|
|
|
2019-03-29 23:03:51 +01:00
|
|
|
/* For ac_build_fetch_format.
|
|
|
|
*
|
|
|
|
* Note: FLOAT must be 0 (used for convenience of encoding in radeonsi).
|
|
|
|
*/
|
|
|
|
enum {
|
|
|
|
AC_FETCH_FORMAT_FLOAT = 0,
|
|
|
|
AC_FETCH_FORMAT_FIXED,
|
|
|
|
AC_FETCH_FORMAT_UNORM,
|
|
|
|
AC_FETCH_FORMAT_SNORM,
|
|
|
|
AC_FETCH_FORMAT_USCALED,
|
|
|
|
AC_FETCH_FORMAT_SSCALED,
|
|
|
|
AC_FETCH_FORMAT_UINT,
|
|
|
|
AC_FETCH_FORMAT_SINT,
|
|
|
|
};
|
|
|
|
|
|
|
|
LLVMValueRef
|
|
|
|
ac_build_opencoded_load_format(struct ac_llvm_context *ctx,
|
|
|
|
unsigned log_size,
|
|
|
|
unsigned num_channels,
|
|
|
|
unsigned format,
|
|
|
|
bool reverse,
|
|
|
|
bool known_aligned,
|
|
|
|
LLVMValueRef rsrc,
|
|
|
|
LLVMValueRef vindex,
|
|
|
|
LLVMValueRef voffset,
|
|
|
|
LLVMValueRef soffset,
|
2019-06-28 20:53:15 -04:00
|
|
|
unsigned cache_policy,
|
2019-03-29 23:03:51 +01:00
|
|
|
bool can_speculate);
|
|
|
|
|
2019-03-13 14:52:27 +01:00
|
|
|
void
|
|
|
|
ac_build_tbuffer_store_short(struct ac_llvm_context *ctx,
|
|
|
|
LLVMValueRef rsrc,
|
|
|
|
LLVMValueRef vdata,
|
|
|
|
LLVMValueRef voffset,
|
|
|
|
LLVMValueRef soffset,
|
2019-06-28 20:53:15 -04:00
|
|
|
unsigned cache_policy);
|
2019-03-13 14:52:27 +01:00
|
|
|
|
2019-03-13 16:08:32 +01:00
|
|
|
void
|
|
|
|
ac_build_tbuffer_store_byte(struct ac_llvm_context *ctx,
|
|
|
|
LLVMValueRef rsrc,
|
|
|
|
LLVMValueRef vdata,
|
|
|
|
LLVMValueRef voffset,
|
|
|
|
LLVMValueRef soffset,
|
2019-06-28 20:53:15 -04:00
|
|
|
unsigned cache_policy);
|
2019-03-13 16:08:32 +01:00
|
|
|
|
2019-03-13 14:48:53 +01:00
|
|
|
void
|
|
|
|
ac_build_struct_tbuffer_store(struct ac_llvm_context *ctx,
|
|
|
|
LLVMValueRef rsrc,
|
|
|
|
LLVMValueRef vdata,
|
|
|
|
LLVMValueRef vindex,
|
|
|
|
LLVMValueRef voffset,
|
|
|
|
LLVMValueRef soffset,
|
|
|
|
LLVMValueRef immoffset,
|
|
|
|
unsigned num_channels,
|
|
|
|
unsigned dfmt,
|
|
|
|
unsigned nfmt,
|
2019-06-28 20:53:15 -04:00
|
|
|
unsigned cache_policy);
|
2019-03-13 14:48:53 +01:00
|
|
|
|
|
|
|
void
|
|
|
|
ac_build_raw_tbuffer_store(struct ac_llvm_context *ctx,
|
|
|
|
LLVMValueRef rsrc,
|
|
|
|
LLVMValueRef vdata,
|
|
|
|
LLVMValueRef voffset,
|
|
|
|
LLVMValueRef soffset,
|
|
|
|
LLVMValueRef immoffset,
|
|
|
|
unsigned num_channels,
|
|
|
|
unsigned dfmt,
|
|
|
|
unsigned nfmt,
|
2019-06-28 20:53:15 -04:00
|
|
|
unsigned cache_policy);
|
2019-03-13 14:48:53 +01:00
|
|
|
|
2017-02-03 10:05:00 +10:00
|
|
|
LLVMValueRef
|
|
|
|
ac_get_thread_id(struct ac_llvm_context *ctx);
|
|
|
|
|
|
|
|
#define AC_TID_MASK_TOP_LEFT 0xfffffffc
|
|
|
|
#define AC_TID_MASK_TOP 0xfffffffd
|
|
|
|
#define AC_TID_MASK_LEFT 0xfffffffe
|
|
|
|
|
|
|
|
LLVMValueRef
|
2017-02-26 00:41:37 +01:00
|
|
|
ac_build_ddxy(struct ac_llvm_context *ctx,
|
|
|
|
uint32_t mask,
|
|
|
|
int idx,
|
|
|
|
LLVMValueRef val);
|
2017-02-03 10:05:00 +10:00
|
|
|
|
2017-02-13 22:08:30 +00:00
|
|
|
#define AC_SENDMSG_GS 2
|
|
|
|
#define AC_SENDMSG_GS_DONE 3
|
2019-05-07 22:34:50 +02:00
|
|
|
#define AC_SENDMSG_GS_ALLOC_REQ 9
|
2017-02-13 22:08:30 +00:00
|
|
|
|
|
|
|
#define AC_SENDMSG_GS_OP_NOP (0 << 4)
|
|
|
|
#define AC_SENDMSG_GS_OP_CUT (1 << 4)
|
|
|
|
#define AC_SENDMSG_GS_OP_EMIT (2 << 4)
|
|
|
|
#define AC_SENDMSG_GS_OP_EMIT_CUT (3 << 4)
|
|
|
|
|
2017-02-26 00:41:37 +01:00
|
|
|
void ac_build_sendmsg(struct ac_llvm_context *ctx,
|
|
|
|
uint32_t msg,
|
|
|
|
LLVMValueRef wave_id);
|
2017-02-13 22:08:30 +00:00
|
|
|
|
2017-02-26 00:41:37 +01:00
|
|
|
LLVMValueRef ac_build_imsb(struct ac_llvm_context *ctx,
|
|
|
|
LLVMValueRef arg,
|
|
|
|
LLVMTypeRef dst_type);
|
2017-02-16 03:42:56 +00:00
|
|
|
|
2017-02-26 00:41:37 +01:00
|
|
|
LLVMValueRef ac_build_umsb(struct ac_llvm_context *ctx,
|
2017-02-16 03:53:27 +00:00
|
|
|
LLVMValueRef arg,
|
|
|
|
LLVMTypeRef dst_type);
|
2018-01-02 03:59:43 +01:00
|
|
|
LLVMValueRef ac_build_fmin(struct ac_llvm_context *ctx, LLVMValueRef a,
|
|
|
|
LLVMValueRef b);
|
|
|
|
LLVMValueRef ac_build_fmax(struct ac_llvm_context *ctx, LLVMValueRef a,
|
|
|
|
LLVMValueRef b);
|
2018-01-02 04:34:53 +01:00
|
|
|
LLVMValueRef ac_build_imin(struct ac_llvm_context *ctx, LLVMValueRef a,
|
|
|
|
LLVMValueRef b);
|
|
|
|
LLVMValueRef ac_build_imax(struct ac_llvm_context *ctx, LLVMValueRef a,
|
|
|
|
LLVMValueRef b);
|
2017-06-25 17:56:37 +02:00
|
|
|
LLVMValueRef ac_build_umin(struct ac_llvm_context *ctx, LLVMValueRef a, LLVMValueRef b);
|
2019-04-10 17:16:49 +02:00
|
|
|
LLVMValueRef ac_build_umax(struct ac_llvm_context *ctx, LLVMValueRef a, LLVMValueRef b);
|
2017-02-26 00:41:37 +01:00
|
|
|
LLVMValueRef ac_build_clamp(struct ac_llvm_context *ctx, LLVMValueRef value);
|
2017-02-16 22:41:16 +01:00
|
|
|
|
2017-02-23 02:06:40 +01:00
|
|
|
struct ac_export_args {
|
|
|
|
LLVMValueRef out[4];
|
|
|
|
unsigned target;
|
|
|
|
unsigned enabled_channels;
|
|
|
|
bool compr;
|
|
|
|
bool done;
|
|
|
|
bool valid_mask;
|
|
|
|
};
|
|
|
|
|
2017-02-26 00:41:37 +01:00
|
|
|
void ac_build_export(struct ac_llvm_context *ctx, struct ac_export_args *a);
|
2017-02-23 02:06:40 +01:00
|
|
|
|
2018-02-07 19:09:12 +01:00
|
|
|
void ac_build_export_null(struct ac_llvm_context *ctx);
|
|
|
|
|
2017-02-23 23:00:19 +01:00
|
|
|
enum ac_image_opcode {
|
|
|
|
ac_image_sample,
|
|
|
|
ac_image_gather4,
|
|
|
|
ac_image_load,
|
|
|
|
ac_image_load_mip,
|
2018-04-20 09:29:57 +02:00
|
|
|
ac_image_store,
|
|
|
|
ac_image_store_mip,
|
2017-02-23 23:00:19 +01:00
|
|
|
ac_image_get_lod,
|
|
|
|
ac_image_get_resinfo,
|
2018-04-20 09:29:57 +02:00
|
|
|
ac_image_atomic,
|
|
|
|
ac_image_atomic_cmpswap,
|
|
|
|
};
|
|
|
|
|
|
|
|
enum ac_atomic_op {
|
|
|
|
ac_atomic_swap,
|
|
|
|
ac_atomic_add,
|
|
|
|
ac_atomic_sub,
|
|
|
|
ac_atomic_smin,
|
|
|
|
ac_atomic_umin,
|
|
|
|
ac_atomic_smax,
|
|
|
|
ac_atomic_umax,
|
|
|
|
ac_atomic_and,
|
|
|
|
ac_atomic_or,
|
|
|
|
ac_atomic_xor,
|
2019-07-24 12:09:31 +02:00
|
|
|
ac_atomic_inc_wrap,
|
|
|
|
ac_atomic_dec_wrap,
|
2017-02-23 23:00:19 +01:00
|
|
|
};
|
|
|
|
|
2018-02-16 14:21:56 +01:00
|
|
|
enum ac_image_dim {
|
|
|
|
ac_image_1d,
|
|
|
|
ac_image_2d,
|
|
|
|
ac_image_3d,
|
|
|
|
ac_image_cube, // includes cube arrays
|
|
|
|
ac_image_1darray,
|
|
|
|
ac_image_2darray,
|
|
|
|
ac_image_2dmsaa,
|
|
|
|
ac_image_2darraymsaa,
|
|
|
|
};
|
|
|
|
|
2018-04-20 09:29:57 +02:00
|
|
|
/* These cache policy bits match the definitions used by the LLVM intrinsics. */
|
|
|
|
enum ac_image_cache_policy {
|
2019-05-24 18:48:39 -04:00
|
|
|
ac_glc = 1 << 0, /* per-CU cache control */
|
|
|
|
ac_slc = 1 << 1, /* global L2 cache control */
|
|
|
|
ac_dlc = 1 << 2, /* per-shader-array cache control */
|
2018-04-20 09:29:57 +02:00
|
|
|
};
|
|
|
|
|
2017-02-23 23:00:19 +01:00
|
|
|
struct ac_image_args {
|
2018-04-20 09:29:57 +02:00
|
|
|
enum ac_image_opcode opcode : 4;
|
|
|
|
enum ac_atomic_op atomic : 4; /* for the ac_image_atomic opcode */
|
|
|
|
enum ac_image_dim dim : 3;
|
|
|
|
unsigned dmask : 4;
|
2019-05-24 18:48:39 -04:00
|
|
|
unsigned cache_policy : 3;
|
2018-04-20 09:29:57 +02:00
|
|
|
bool unorm : 1;
|
|
|
|
bool level_zero : 1;
|
|
|
|
unsigned attributes; /* additional call-site specific AC_FUNC_ATTRs */
|
2017-02-23 23:00:19 +01:00
|
|
|
|
|
|
|
LLVMValueRef resource;
|
|
|
|
LLVMValueRef sampler;
|
2018-04-20 09:29:57 +02:00
|
|
|
LLVMValueRef data[2]; /* data[0] is source data (vector); data[1] is cmp for cmpswap */
|
2018-03-23 11:20:24 +01:00
|
|
|
LLVMValueRef offset;
|
|
|
|
LLVMValueRef bias;
|
|
|
|
LLVMValueRef compare;
|
|
|
|
LLVMValueRef derivs[6];
|
|
|
|
LLVMValueRef coords[4];
|
|
|
|
LLVMValueRef lod; // also used by ac_image_get_resinfo
|
2017-02-23 23:00:19 +01:00
|
|
|
};
|
|
|
|
|
2017-02-26 00:41:37 +01:00
|
|
|
LLVMValueRef ac_build_image_opcode(struct ac_llvm_context *ctx,
|
|
|
|
struct ac_image_args *a);
|
|
|
|
LLVMValueRef ac_build_cvt_pkrtz_f16(struct ac_llvm_context *ctx,
|
|
|
|
LLVMValueRef args[2]);
|
2018-01-02 04:34:53 +01:00
|
|
|
LLVMValueRef ac_build_cvt_pknorm_i16(struct ac_llvm_context *ctx,
|
|
|
|
LLVMValueRef args[2]);
|
|
|
|
LLVMValueRef ac_build_cvt_pknorm_u16(struct ac_llvm_context *ctx,
|
|
|
|
LLVMValueRef args[2]);
|
|
|
|
LLVMValueRef ac_build_cvt_pk_i16(struct ac_llvm_context *ctx,
|
|
|
|
LLVMValueRef args[2], unsigned bits, bool hi);
|
|
|
|
LLVMValueRef ac_build_cvt_pk_u16(struct ac_llvm_context *ctx,
|
|
|
|
LLVMValueRef args[2], unsigned bits, bool hi);
|
2017-10-04 05:07:50 +02:00
|
|
|
LLVMValueRef ac_build_wqm_vote(struct ac_llvm_context *ctx, LLVMValueRef i1);
|
2017-10-04 04:51:39 +02:00
|
|
|
void ac_build_kill_if_false(struct ac_llvm_context *ctx, LLVMValueRef i1);
|
2017-02-26 00:41:37 +01:00
|
|
|
LLVMValueRef ac_build_bfe(struct ac_llvm_context *ctx, LLVMValueRef input,
|
|
|
|
LLVMValueRef offset, LLVMValueRef width,
|
|
|
|
bool is_signed);
|
2018-08-14 01:49:49 -04:00
|
|
|
LLVMValueRef ac_build_imad(struct ac_llvm_context *ctx, LLVMValueRef s0,
|
|
|
|
LLVMValueRef s1, LLVMValueRef s2);
|
|
|
|
LLVMValueRef ac_build_fmad(struct ac_llvm_context *ctx, LLVMValueRef s0,
|
|
|
|
LLVMValueRef s1, LLVMValueRef s2);
|
2017-02-23 23:00:19 +01:00
|
|
|
|
2019-06-24 16:13:24 -04:00
|
|
|
void ac_build_waitcnt(struct ac_llvm_context *ctx, unsigned wait_flags);
|
2017-12-12 18:10:23 +01:00
|
|
|
|
2018-03-02 15:01:30 +01:00
|
|
|
LLVMValueRef ac_build_fract(struct ac_llvm_context *ctx, LLVMValueRef src0,
|
|
|
|
unsigned bitsize);
|
|
|
|
|
2019-03-25 13:37:46 +01:00
|
|
|
LLVMValueRef ac_build_fmed3(struct ac_llvm_context *ctx, LLVMValueRef src0,
|
|
|
|
LLVMValueRef src1, LLVMValueRef src2,
|
|
|
|
unsigned bitsize);
|
|
|
|
|
2018-03-02 15:01:31 +01:00
|
|
|
LLVMValueRef ac_build_isign(struct ac_llvm_context *ctx, LLVMValueRef src0,
|
2018-03-02 15:01:32 +01:00
|
|
|
unsigned bitsize);
|
|
|
|
|
|
|
|
LLVMValueRef ac_build_fsign(struct ac_llvm_context *ctx, LLVMValueRef src0,
|
2018-03-02 15:01:31 +01:00
|
|
|
unsigned bitsize);
|
|
|
|
|
2018-09-14 12:52:32 +02:00
|
|
|
LLVMValueRef ac_build_bit_count(struct ac_llvm_context *ctx, LLVMValueRef src0);
|
|
|
|
|
2018-09-14 12:52:33 +02:00
|
|
|
LLVMValueRef ac_build_bitfield_reverse(struct ac_llvm_context *ctx,
|
|
|
|
LLVMValueRef src0);
|
|
|
|
|
2017-04-29 23:53:08 +02:00
|
|
|
void ac_optimize_vs_outputs(struct ac_llvm_context *ac,
|
|
|
|
LLVMValueRef main_fn,
|
|
|
|
uint8_t *vs_output_param_offset,
|
|
|
|
uint32_t num_outputs,
|
|
|
|
uint8_t *num_param_exports);
|
2017-10-19 05:29:02 +01:00
|
|
|
void ac_init_exec_full_mask(struct ac_llvm_context *ctx);
|
2017-10-26 14:43:51 +10:00
|
|
|
|
|
|
|
void ac_declare_lds_as_pointer(struct ac_llvm_context *ac);
|
|
|
|
LLVMValueRef ac_lds_load(struct ac_llvm_context *ctx,
|
|
|
|
LLVMValueRef dw_addr);
|
|
|
|
void ac_lds_store(struct ac_llvm_context *ctx,
|
|
|
|
LLVMValueRef dw_addr, LLVMValueRef value);
|
2017-10-26 15:28:41 +10:00
|
|
|
|
|
|
|
LLVMValueRef ac_find_lsb(struct ac_llvm_context *ctx,
|
|
|
|
LLVMTypeRef dst_type,
|
|
|
|
LLVMValueRef src0);
|
2017-12-31 23:35:59 +01:00
|
|
|
|
|
|
|
LLVMTypeRef ac_array_in_const_addr_space(LLVMTypeRef elem_type);
|
2018-01-01 21:04:22 +01:00
|
|
|
LLVMTypeRef ac_array_in_const32_addr_space(LLVMTypeRef elem_type);
|
2017-12-31 23:35:59 +01:00
|
|
|
|
2018-03-07 10:53:34 +11:00
|
|
|
void ac_build_bgnloop(struct ac_llvm_context *ctx, int lable_id);
|
|
|
|
void ac_build_break(struct ac_llvm_context *ctx);
|
|
|
|
void ac_build_continue(struct ac_llvm_context *ctx);
|
|
|
|
void ac_build_else(struct ac_llvm_context *ctx, int lable_id);
|
|
|
|
void ac_build_endif(struct ac_llvm_context *ctx, int lable_id);
|
|
|
|
void ac_build_endloop(struct ac_llvm_context *ctx, int lable_id);
|
2018-05-23 22:04:20 +02:00
|
|
|
void ac_build_ifcc(struct ac_llvm_context *ctx, LLVMValueRef cond, int label_id);
|
2018-03-07 10:53:34 +11:00
|
|
|
void ac_build_if(struct ac_llvm_context *ctx, LLVMValueRef value,
|
|
|
|
int lable_id);
|
|
|
|
void ac_build_uif(struct ac_llvm_context *ctx, LLVMValueRef value,
|
|
|
|
int lable_id);
|
|
|
|
|
2018-03-09 16:22:44 +01:00
|
|
|
LLVMValueRef ac_build_alloca(struct ac_llvm_context *ac, LLVMTypeRef type,
|
|
|
|
const char *name);
|
|
|
|
LLVMValueRef ac_build_alloca_undef(struct ac_llvm_context *ac, LLVMTypeRef type,
|
|
|
|
const char *name);
|
|
|
|
|
2018-03-09 16:26:34 +01:00
|
|
|
LLVMValueRef ac_cast_ptr(struct ac_llvm_context *ctx, LLVMValueRef ptr,
|
|
|
|
LLVMTypeRef type);
|
|
|
|
|
2018-03-09 16:36:31 +01:00
|
|
|
LLVMValueRef ac_trim_vector(struct ac_llvm_context *ctx, LLVMValueRef value,
|
|
|
|
unsigned count);
|
|
|
|
|
2018-03-09 16:39:35 +01:00
|
|
|
LLVMValueRef ac_unpack_param(struct ac_llvm_context *ctx, LLVMValueRef param,
|
|
|
|
unsigned rshift, unsigned bitwidth);
|
|
|
|
|
2018-03-20 19:14:57 -04:00
|
|
|
void ac_apply_fmask_to_sample(struct ac_llvm_context *ac, LLVMValueRef fmask,
|
|
|
|
LLVMValueRef *addr, bool is_array_tex);
|
|
|
|
|
2018-03-06 15:03:36 +01:00
|
|
|
LLVMValueRef
|
|
|
|
ac_build_ds_swizzle(struct ac_llvm_context *ctx, LLVMValueRef src, unsigned mask);
|
|
|
|
|
|
|
|
LLVMValueRef
|
|
|
|
ac_build_readlane(struct ac_llvm_context *ctx, LLVMValueRef src, LLVMValueRef lane);
|
|
|
|
|
|
|
|
LLVMValueRef
|
|
|
|
ac_build_writelane(struct ac_llvm_context *ctx, LLVMValueRef src, LLVMValueRef value, LLVMValueRef lane);
|
|
|
|
|
|
|
|
LLVMValueRef
|
|
|
|
ac_build_mbcnt(struct ac_llvm_context *ctx, LLVMValueRef mask);
|
|
|
|
|
|
|
|
LLVMValueRef
|
|
|
|
ac_build_inclusive_scan(struct ac_llvm_context *ctx, LLVMValueRef src, nir_op op);
|
|
|
|
|
|
|
|
LLVMValueRef
|
|
|
|
ac_build_exclusive_scan(struct ac_llvm_context *ctx, LLVMValueRef src, nir_op op);
|
|
|
|
|
|
|
|
LLVMValueRef
|
|
|
|
ac_build_reduce(struct ac_llvm_context *ctx, LLVMValueRef src, nir_op op, unsigned cluster_size);
|
|
|
|
|
2018-05-23 22:09:27 +02:00
|
|
|
/**
|
|
|
|
* Common arguments for a scan/reduce operation that accumulates per-wave
|
|
|
|
* values across an entire workgroup, while respecting the order of waves.
|
|
|
|
*/
|
|
|
|
struct ac_wg_scan {
|
|
|
|
bool enable_reduce;
|
|
|
|
bool enable_exclusive;
|
|
|
|
bool enable_inclusive;
|
|
|
|
nir_op op;
|
|
|
|
LLVMValueRef src; /* clobbered! */
|
|
|
|
LLVMValueRef result_reduce;
|
|
|
|
LLVMValueRef result_exclusive;
|
|
|
|
LLVMValueRef result_inclusive;
|
|
|
|
LLVMValueRef extra;
|
|
|
|
LLVMValueRef waveidx;
|
|
|
|
LLVMValueRef numwaves; /* only needed for "reduce" operations */
|
|
|
|
|
|
|
|
/* T addrspace(LDS) pointer to the same type as value, at least maxwaves entries */
|
|
|
|
LLVMValueRef scratch;
|
|
|
|
unsigned maxwaves;
|
|
|
|
};
|
|
|
|
|
|
|
|
void
|
|
|
|
ac_build_wg_wavescan_top(struct ac_llvm_context *ctx, struct ac_wg_scan *ws);
|
|
|
|
void
|
|
|
|
ac_build_wg_wavescan_bottom(struct ac_llvm_context *ctx, struct ac_wg_scan *ws);
|
|
|
|
void
|
|
|
|
ac_build_wg_wavescan(struct ac_llvm_context *ctx, struct ac_wg_scan *ws);
|
|
|
|
|
|
|
|
void
|
|
|
|
ac_build_wg_scan_top(struct ac_llvm_context *ctx, struct ac_wg_scan *ws);
|
|
|
|
void
|
|
|
|
ac_build_wg_scan_bottom(struct ac_llvm_context *ctx, struct ac_wg_scan *ws);
|
|
|
|
void
|
|
|
|
ac_build_wg_scan(struct ac_llvm_context *ctx, struct ac_wg_scan *ws);
|
|
|
|
|
2018-03-06 15:03:36 +01:00
|
|
|
LLVMValueRef
|
|
|
|
ac_build_quad_swizzle(struct ac_llvm_context *ctx, LLVMValueRef src,
|
|
|
|
unsigned lane0, unsigned lane1, unsigned lane2, unsigned lane3);
|
|
|
|
|
|
|
|
LLVMValueRef
|
|
|
|
ac_build_shuffle(struct ac_llvm_context *ctx, LLVMValueRef src, LLVMValueRef index);
|
|
|
|
|
2019-03-22 11:59:32 +01:00
|
|
|
LLVMValueRef
|
|
|
|
ac_build_frexp_exp(struct ac_llvm_context *ctx, LLVMValueRef src0,
|
|
|
|
unsigned bitsize);
|
|
|
|
|
2019-03-21 15:47:04 +01:00
|
|
|
LLVMValueRef
|
|
|
|
ac_build_frexp_mant(struct ac_llvm_context *ctx, LLVMValueRef src0,
|
|
|
|
unsigned bitsize);
|
|
|
|
|
2019-04-10 17:16:50 +02:00
|
|
|
LLVMValueRef
|
|
|
|
ac_build_ddxy_interp(struct ac_llvm_context *ctx, LLVMValueRef interp_ij);
|
|
|
|
|
2019-04-10 17:16:51 +02:00
|
|
|
LLVMValueRef
|
|
|
|
ac_build_load_helper_invocation(struct ac_llvm_context *ctx);
|
|
|
|
|
2019-06-19 19:00:50 -04:00
|
|
|
LLVMValueRef ac_build_call(struct ac_llvm_context *ctx, LLVMValueRef func,
|
|
|
|
LLVMValueRef *args, unsigned num_args);
|
|
|
|
|
ac,ac/nir: use a better sync scope for shared atomics
https://reviews.llvm.org/rL356946 (present in LLVM 9 and later) changed
the meaning of the "system" sync scope, making it no longer restricted to
the memory operation's address space. So a single address space sync scope
is needed for shared atomic operations (such as "system-one-as" or
"workgroup-one-as") otherwise buffer_wbinvl1 and s_waitcnt instructions
can be created at each shared atomic operation.
This mostly reimplements LLVMBuildAtomicRMW and LLVMBuildAtomicCmpXchg
to allow for more sync scopes and uses the new functions in ac->nir with
the "workgroup-one-as" or "workgroup" sync scopes.
F1 2017 (4K, Ultra High settings, TAA), avg FPS : 59 -> 59.67 (+1.14%)
Strange Brigade (4K, ~highest settings), avg FPS : 51.5 -> 51.6 (+0.19%)
RotTR/mountain (4K, VeryHigh settings, FXAA), avg FPS : 57.2 -> 57.2 (+0.0%)
RotTR/tomb (4K, VeryHigh settings, FXAA), avg FPS : 42.5 -> 43.0 (+1.17%)
RotTR/valley (4K, VeryHigh settings, FXAA), avg FPS : 40.7 -> 41.6 (+2.21%)
Warhammer II/fallen, avg FPS : 31.63 -> 31.83 (+0.63%)
Warhammer II/skaven, avg FPS : 37.77 -> 38.07 (+0.79%)
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2019-04-25 14:44:40 +01:00
|
|
|
LLVMValueRef ac_build_atomic_rmw(struct ac_llvm_context *ctx, LLVMAtomicRMWBinOp op,
|
|
|
|
LLVMValueRef ptr, LLVMValueRef val,
|
|
|
|
const char *sync_scope);
|
|
|
|
|
|
|
|
LLVMValueRef ac_build_atomic_cmp_xchg(struct ac_llvm_context *ctx, LLVMValueRef ptr,
|
|
|
|
LLVMValueRef cmp, LLVMValueRef val,
|
|
|
|
const char *sync_scope);
|
|
|
|
|
2017-02-03 10:05:00 +10:00
|
|
|
#ifdef __cplusplus
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
#endif
|